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70
72
74
76
78
80
SNR − dBFS
Input Amplitude − dBFS
20
40
60
80
100
120
−60 −50 −40 −30 −20 −10 0
SFDR − dBc, dBFS
G032
f
IN
= 20.1 MHz
SFDR (dBc)
SFDR (dBFS)
SNR (dBFS)
T − Temperature − °C
83
85
87
89
91
93
−40 −20 0 20 40 60 80
SFDR − dBc
G031
SNR − dBFS
72
73
74
75
76
77
f
IN
= 10.1 MHz
SNR
SFDR
76
78
80
82
84
86
88
90
92
0.5 1.0 1.5 2.0 2.5 3.0
SFDR − dBc
Input Clock Amplitude − V
PP
G033
SNR
SFDR
f
IN
= 20.1 MHz
SNR − dBFS
72
73
74
75
76
77
78
79
80
Input Clock Duty Cycle − %
80
82
84
86
88
90
92
94
96
30 35 40 45 50 55 60 65 70
SFDR − dBc
G034
SNR − dBFS
71
72
73
74
75
76
77
78
79
SNR
SFDR
f
IN
= 10.1 MHz
V
VCM
− VCM Voltage − V
86
88
90
92
94
96
1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70
f
IN
= 20.1 MHz
External Reference Mode
SFDR − dBc
G036
SNR
SFDR
SNR − dBFS
68
70
72
74
76
78
Output Code
0
5
10
15
20
25
30
35
40
8206 8207 8208 8209 8210 8211 8212 8213 8214 8215
Occurence − %
G035
RMS (LSB) = 1.049
ADS6145, ADS6144
ADS6143, ADS6142
SLWS198B – JULY 2007 – REVISED MARCH 2008
TYPICAL CHARACTERISTICS - ADS6144 (F
S
= 105 MSPS) (continued)
All plots are at 25 ° C, AVDD = DRVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 V
PP
differential
clock amplitude, 50% clock duty cycle, – 1 dBFS differential analog input, internal reference mode, 0 dB gain, CMOS output
interface (unless otherwise noted)
PERFORMANCE vs TEMPERATURE PERFORMANCE vs INPUT AMPLITUDE
Figure 39. Figure 40.
PERFORMANCE vs CLOCK AMPLITUDE PERFORMANCE vs INPUT CLOCK DUTY CYCLE
Figure 41. Figure 42.
OUTPUT NOISE HISTOGRAM WITH
INPUTS TIED TO COMMON-MODE PERFORMANCE IN EXTERNAL REFERENCE MODE
Figure 43. Figure 44.
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Product Folder Link(s): ADS6145, ADS6144 ADS6143, ADS6142