Datasheet
www.ti.com
SERIAL REGISTER MAP
ADS6145, ADS6144
ADS6143, ADS6142
SLWS198B – JULY 2007 – REVISED MARCH 2008
Table 4 gives a summary of all the modes that can be programmed through the serial interface.
Table 4. Summary of Functions Supported by Serial Interface
(1) (2)
REGISTER
ADDRESS REGISTER FUNCTIONS
IN HEX
A4 - A0 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
<PDN <LVDS <PDN
OBUF> CMOS> <REF> CLKOUT>
<COARSE <RST> <STBY>
Output LVDS or Internal or Output
00 GAIN> 0 0 Software 0 0 ADC Power
buffers CMOS external clock buffer
Coarse gain reset down
powered Output Reference powered
down interface down
<DATAOUT <CLKOUT <CLKOUT
POSN> EDGE> POSN>
04 Output data Output Output clock 0 0 0 0 0 0 0 0
position clock edge position
control control control
Bit-wise or
09 Byte-wise 0 0 0 0 0 0 0 0 0 0
control
<DATA
FORMAT>
2s
0A 0 0 <TEST PATTERNS> 0 0 0 0 0
Complemen
t or straight
binary
<CUSTOM LOW>
0B 0 0
Custom pattern lower 9 bits
<FINE GAIN> <CUSTOM HIGH>
0C 0 0 0
Fine gain 0 to 6dB Custom pattern upper 5 bits
<CURRENT
LVDS Termination <LVDS CURRENT>
0E 0 DOUBLE>
LVDS Internal termination control for output data and clock LVDS Current control
LVDS current double
<DRIVE STRENGTH>
0F 0 0 0 0 0 0 0
CMOS output buffer drive strength control
(1) The unused bits in each register (shown by blank cells in above table) must be programmed as ‘ 0 ’ .
(2) Multiple functions in a register can be programmed in a single write operation.
Copyright © 2007 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): ADS6145, ADS6144 ADS6143, ADS6142