Datasheet

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Clock Frequency − MHz
0
100
200
300
400
500
600
700
800
900
1000
0 25 50 75 100 125
Impedance (Magnitude) −
G082
CLKP
CLKM
DifferentialSine-Wave
orPECL orLVDS
ClockInput
ADS612x
0.1 Fm
0.1 Fm
CLKP
CLKM
CMOSClockInput
ADS612x
0.1 Fm
0.1 Fm
ADS6125, ADS6124
ADS6123, ADS6122
SLAS560A OCTOBER 2007 REVISED MARCH 2008
Figure 98. Clock Buffer Input Impedance
Figure 99. Differential Clock Driving Circuit
Figure 100. Single-Ended Clock Driving Circuit
48 Submit Documentation Feedback Copyright © 2007 2008, Texas Instruments Incorporated
Product Folder Link(s): ADS6125, ADS6124 ADS6123, ADS6122