Datasheet

www.ti.com
50
55
60
65
70
75
80
85
90
Input Amplitude − dBFS
f
IN
= 20.1 MHz
G068
SFDR (dBc)
SNR − dBFS
SFDR (dBFS)
SNR (dBFS)
30
40
50
60
70
80
90
100
110
−60 −50 −40 −30 −20 −10 0
SFDR − dBc, dBFS
SNR − dBFS
70
71
72
73
74
75
76
T − Temperature − °C
G067
SNR
SFDR
86
88
90
92
94
96
98
−40 −20 0 20 40 60 80
SFDR − dBc
f
IN
= 10.1 MHz
80
82
84
86
88
90
92
94
96
0.5 1.0 1.5 2.0 2.5 3.0
SFDR − dBc
Input Clock Amplitude − V
PP
G069
SNR − dBFS
68.0
68.5
69.0
69.5
70.0
70.5
71.0
71.5
72.0
f
IN
= 20.1 MHz
SNR
SFDR
SNR − dBFS
68.0
68.5
69.0
69.5
70.0
70.5
71.0
71.5
72.0
Input Clock Duty Cycle − %
G070
f
IN
= 10.1 MHz
SNR
SFDR
80
82
84
86
88
90
92
94
96
30 35 40 45 50 55 60 65 70
SFDR − dBc
SNR − dBFS
68
70
72
74
76
78
V
VCM
− VCM Voltage − V
G072
f
IN
= 20.1 MHz
External Reference Mode
SNR
SFDR
85
87
89
91
93
95
1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70
SFDR − dBc
ADS6125, ADS6124
ADS6123, ADS6122
SLAS560A – OCTOBER 2007 – REVISED MARCH 2008
TYPICAL CHARACTERISTICS - ADS6122 (F
S
= 65 MSPS) (continued)
All plots are at 25 ° C, AVDD = DRVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 V
PP
differential
clock amplitude, 50% clock duty cycle, – 1 dBFS differential analog input, internal reference mode, 0 dB gain, CMOS output
interface (unless otherwise noted)
PERFORMANCE vs TEMPERATURE PERFORMANCE vs INPUT AMPLITUDE
Figure 73. Figure 74.
PERFORMANCE vs CLOCK AMPLITUDE PERFORMANCE vs INPUT CLOCK DUTY CYCLE
Figure 75. Figure 76.
PERFORMANCE IN EXTERNAL REFERENCE MODE
Figure 77.
36 Submit Documentation Feedback Copyright © 2007 – 2008, Texas Instruments Incorporated
Product Folder Link(s): ADS6125, ADS6124 ADS6123, ADS6122