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T − Temperature − °C
89
91
93
95
97
99
−40 −20 0 20 40 60 80
SFDR − dBc
G049
69
70
71
72
73
74
SNR − dBFS
f
IN
= 10.1 MHz
SFDR
SNR
50
55
60
65
70
75
80
85
90
SNR − dBFS
Input Amplitude − dBFS
G050
f
IN
= 20 MHz
SFDR (dBc)
SFDR (dBFS)
SNR (dBFS)
30
40
50
60
70
80
90
100
110
−60 −50 −40 −30 −20 −10 0
SFDR − dBc, dBFS
SNR − dBFS
68.0
68.5
69.0
69.5
70.0
70.5
71.0
71.5
72.0
Input Clock Duty Cycle − %
G052
SNR
SFDR
f
IN
= 10.1 MHz
82
84
86
88
90
92
94
96
98
30 35 40 45 50 55 60 65 70
SFDR − dBc
78
80
82
84
86
88
90
92
94
0.5 1.0 1.5 2.0 2.5 3.0
SFDR − dBc
Input Clock Amplitude − V
PP
G051
SNR − dBFS
68.0
68.5
69.0
69.5
70.0
70.5
71.0
71.5
72.0
f
IN
= 20.1 MHz
SNR
SFDR
V
VCM
− VCM Voltage − V
82
84
86
88
90
92
1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70
f
IN
= 20.1 MHz
External Reference Mode
SFDR − dBc
G054
SNR − dBFS
68
70
72
74
76
78
SNR
SFDR
ADS6125, ADS6124
ADS6123, ADS6122
SLAS560A – OCTOBER 2007 – REVISED MARCH 2008
TYPICAL CHARACTERISTICS - ADS6123 (F
S
= 80 MSPS) (continued)
All plots are at 25 ° C, AVDD = DRVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 V
PP
differential
clock amplitude, 50% clock duty cycle, – 1 dBFS differential analog input, internal reference mode, 0 dB gain, CMOS output
interface (unless otherwise noted)
PERFORMANCE vs TEMPERATURE PERFORMANCE vs INPUT AMPLITUDE
Figure 56. Figure 57.
PERFORMANCE vs CLOCK AMPLITUDE PERFORMANCE vs INPUT CLOCK DUTY CYCLE
Figure 58. Figure 59.
PERFORMANCE IN EXTERNAL REFERENCE MODE
Figure 60.
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Product Folder Link(s): ADS6125, ADS6124 ADS6123, ADS6122