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T − Temperature − °C
84
86
88
90
92
94
−40 −20 0 20 40 60 80
SFDR − dBc
G013
SNR − dBFS
69
70
71
72
73
74
f
IN
= 10.1 MHz
SNR
SFDR
50
55
60
65
70
75
80
85
90
−60 −50 −40 −30 −20 −10 0
Input Amplitude − dBFS
f
IN
= 10.1 MHz
SFDR − dBc, dBFS
G014
SNR − dBFS
SFDR (dBFS)
SNR (dBFS)
SFDR (dBc)
30
40
50
60
70
80
90
100
110
76
78
80
82
84
86
88
90
92
0.5 1.0 1.5 2.0 2.5 3.0
SFDR − dBc
Input Clock Amplitude − V
PP
G015
f
IN
= 20.1 MHz
SNR − dBFS
68.0
68.5
69.0
69.5
70.0
70.5
71.0
71.5
72.0
SNR
SFDR
Input Clock Duty Cycle − %
84
85
86
87
88
89
90
91
92
30 35 40 45 50 55 60 65 70
SFDR − dBc
G016
f
IN
= 10.1 MHz
SNR − dBFS
68.0
68.5
69.0
69.5
70.0
70.5
71.0
71.5
72.0
SNR
SFDR
V
VCM
− VCM Voltage − V
83
85
87
89
91
93
1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70
f
IN
= 20.1 MHz
External Reference Mode
SFDR − dBc
G018
SNR − dBFS
66
68
70
72
74
76
SNR
SFDR
Output Code
0
10
20
30
40
50
60
2048 2049 2050 2051 2052 2053 2054 2055 2056 2057
Occurence − %
G017
RMS (LSB) = 0.497
ADS6125, ADS6124
ADS6123, ADS6122
SLAS560A – OCTOBER 2007 – REVISED MARCH 2008
TYPICAL CHARACTERISTICS - ADS6125 (F
S
= 125 MSPS) (continued)
All plots are at 25 ° C, AVDD = DRVDD = 3.3 V, maximum rated sampling frequency, sine wave input clock, 1.5 V
PP
differential
clock amplitude, 50% clock duty cycle, – 1 dBFS differential analog input, internal reference mode, 0 dB gain, CMOS output
interface (unless otherwise noted)
PERFORMANCE vs TEMPERATURE PERFORMANCE vs INPUT AMPLITUDE
Figure 21. Figure 22.
PERFORMANCE vs CLOCK AMPLITUDE PERFORMANCE vs INPUT CLOCK DUTY CYCLE
Figure 23. Figure 24.
OUTPUT NOISE HISTOGRAM
(INPUTS TIED TO COMMON-MODE) PERFORMANCE IN EXTERNAL REFERENCE MODE
Figure 25. Figure 26.
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Product Folder Link(s): ADS6125, ADS6124 ADS6123, ADS6122