Datasheet

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SERIAL REGISTER MAP
ADS6125, ADS6124
ADS6123, ADS6122
SLAS560A – OCTOBER 2007 – REVISED MARCH 2008
Table 4 provides a summary of all the modes that can be programmed through the serial interface.
Table 4. Summary of Functions Supported by Serial Interface
(1) (2)
REGISTER
ADDRESS REGISTER FUNCTIONS
IN HEX
A4 - A0 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
<PDN <PDN
<LVDS
OBUF> <REF> CLKOUT>
<COARSE CMOS> <RST> <STBY>
Output Internal or Output
00 GAIN> LVDS or 0 0 Software 0 0 ADC Power
buffers external clock buffer
Coarse gain CMOS output Reset down
powered Reference powered
interface
down down
<DATAOUT <CLKOUT <CLKOUT
POSN> EDGE> POSN>
04 Output data Output Output Clock 0 0 0 0 0 0 0 0
position Clock edge position
control control control
Bit-wise or
09 Byte-wise 0 0 0 0 0 0 0 0 0 0
control
<DATA
FORMAT>
2s
0A 0 0 <TEST PATTERNS> 0 0 0 0 0
complement
or straight
binary
<CUSTOM LOW>
0B 0 0 0 0
Custom Pattern lower 7bits
<FINE GAIN> <CUSTOM HIGH>
0C 0 0 0
Fine Gain 0 to 6dB Custom Pattern upper 5 bits
<CURRENT
LVDS Termination <LVDS CURRENT>
0E 0 DOUBLE>
LVDS Internal Termination control for output data and clock LVDS Current control
LVDS current double
<DRIVE STRENGTH>
0F 0 0 0 0 0 0 0
CMOS output buffer drive strength control
(1) The unused bits in each register (shown by blank cells in above table) must be programmed as ‘ 0 ’ .
(2) Multiple functions in a register can be programmed in a single write operation.
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Product Folder Link(s): ADS6125, ADS6124 ADS6123, ADS6122