Datasheet

ADS58B18
ADS58B19
www.ti.com SBAS487D – NOVEMBER 2009–REVISED JANUARY 2011
ADS58B18, ADS58B19 Pin Assignments (LVDS Mode) (continued)
# OF
PIN NAME PIN NUMBER PINS FUNCTION DESCRIPTION
Output buffer enable input, active high; this pin has an internal 180kΩ pull-up resistor to
OE 7 1 I
DRVDD.
Data format select input. This pin sets the DATA FORMAT (twos compliment or offset
DFS 6 1 I
binary) and the LVDS/CMOS output interface type. See Table 4 for detailed information.
ADS58B18: Digital control pin for SNRBoost mode, active high.
SNRBoost_En 23 1 I
ADS58B19: Unused.
CLKOUTP 5 1 O Differential output clock, true
CLKOUTM 4 1 O Differential output clock, complement
Refer to Figure 1 and
D0_P 1 O Differential output data D0 and logic low multiplexed, true
Figure 2
Refer to Figure 1 and
D0_M 1 O Differential output data D0 and logic low multiplexed, complement
Figure 2
Refer to Figure 1 and
D1_D2_P 1 O Differential output data D1 and D2 multiplexed, true
Figure 2
Refer to Figure 1 and
D1_D2_M 1 O Differential output data D1 and D2 multiplexed, complement
Figure 2
Refer to Figure 1 and
D3_D4_P 1 O Differential output data D3 and D4 multiplexed, true
Figure 2
Refer to Figure 1 and
D3_D4_M 1 O Differential output data D3 and D4 multiplexed, complement
Figure 2
Refer to Figure 1 and
D5_D6_P 1 O Differential output data D5 and D6 multiplexed, true
Figure 2
Refer to Figure 1 and
D5_D6_M 1 O Differential output data D5 and D6 multiplexed, complement
Figure 2
Refer to Figure 1 and
D7_D8_P 1 O Differential output data D7 and D8 multiplexed, true
Figure 2
Refer to Figure 1 and
D7_D8_M 1 O Differential output data D7 and D8 multiplexed, complement
Figure 2
Refer to Figure 1 and
D9_D10_P 1 O Differential output data D9 and D10 multiplexed, true
Figure 2
Refer to Figure 1 and
D9_D10_M 1 O Differential output data D9 and D10 multiplexed, complement
Figure 2
This pin functions as an out-of-range indicator after reset, when register bit
SERIAL READOUT = 0, and functions as a serial register readout pin when SERIAL
OVR_SDOUT 3 1 O
READOUT = 1.
This pin is a CMOS output level that runs off DRVDD supply.
DRVDD 2, 35 2 I 1.8V digital and output buffer supply
DRGND 1, 36, PAD 2 I Digital and output buffer ground
Refer to Figure 1 and
NC — — Do not connect
Figure 2
© 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): ADS58B18 ADS58B19