Datasheet
ADS58B18
ADS58B19
www.ti.com
SBAS487D – NOVEMBER 2009–REVISED JANUARY 2011
ELECTRICAL CHARACTERISTICS: GENERAL
Typical values are at +25°C, AVDD = 1.8V, DRVDD = 1.8V, 50% clock duty cycle, and 0dB gain, unless otherwise noted.
Minimum and maximum values are across the full temperature range: T
MIN
= –40°C to T
MAX
= +85°C, AVDD = 1.8V, and
DRVDD = 1.8V.
ADS58B18 ADS58B19
PARAMETER MIN TYP MAX MIN TYP MAX UNIT
ANALOG INPUTS
Differential input voltage range 1.5 1.5 V
PP
Differential input resistance (at dc); see Figure 59 4 4 kΩ
Differential input capacitance; see Figure 60 2.1 2.1 pF
Analog input bandwidth 550 550 MHz
Analog input common-mode current (per input pin) < 2 < 2 µA
Common-mode output voltage VCM 1.7 1.7 V
VCM output current capability 4 4 mA
DC ACCURACY
Offset error –15 2 15 –15 2 15 mV
Temperature coefficient of offset error 0.003 0.003 mV/°C
Gain error as a result of internal reference
E
GREF
–2 2 –2 2 %FS
inaccuracy alone
Gain error of channel alone E
GCHAN
–0.2 –1 –0.2 –1 %FS
Temperature coefficient of E
GCHAN
0.001 0.001 Δ%/°C
POWER SUPPLY
IAVDD
88 105 103 113 mA
Analog supply current
IAVDD_BUF
30 40 31 42 mA
Input buffer supply current
IDRVDD
(1)
Output buffer supply current
38 47 mA
LVDS interface with 100Ω external termination
Low LVDS swing (200mV)
IDRVDD
Output buffer supply current
62 75 64 82 mA
LVDS interface with 100Ω external termination
Standard LVDS swing (350mV)
IDRVDD output buffer supply current
(1)(2)
CMOS interface
(2)
26 35 mA
8pF external load capacitance
f
IN
= 2.5MHz
Analog power:
260 287 mW
AVDD + AVDD_BUF supplies
Digital power:
68.7 84.6 mW
LVDS interface, low LVDS swing
Digital power:
CMOS interface
(2)
47 63 mW
8pF external load capacitance
f
IN
= 2.5MHz
Global power-down 10 35 10 35 mW
Standby 185 185 mW
(1) The maximum DRVDD current with CMOS interface depends on the actual load capacitance on the digital output lines. Note that the
maximum recommended load capacitance on each digital output line is 10pF.
(2) In CMOS mode, the DRVDD current scales with the sampling frequency, the load capacitance on output pins, input frequency, and the
supply voltage (see the CMOS Interface Power Dissipation section in the Application Information).
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