Datasheet

0.1 Fm

1:1

25W

INP

INM

0.1 Fm

1:1

50W

INP

INM

50W

ADS58B18

ADS58B19

SBAS487D – NOVEMBER 2009– REVISED JANUARY 2011

www.ti.com

Driving Circuit

Two example driving circuit configurations are shown in Figure 61 and Figure 62—one optimized for low input

frequencies and the other optimized for high input frequencies. Notice in both cases that the board circuitry is

simplified compared to the non-buffered ADS4149.

In Figure 61, a single transformer is used and is suited for low input frequencies. To optimize even-harmonic

performance at high input frequencies (greater than the first Nyquist), the use of back-to-back transformers is

recommended (see Figure 62). Note that both drive circuits have been terminated by 50Ω near the ADC side.

The ac-coupling capacitors allow the analog inputs to self-bias around the required common-mode voltage.

Figure 61. Drive Circuit for Low Input Frequencies

Figure 62. Drive Circuit for High Input Frequencies

The mismatch in the transformer parasitic capacitance (between the windings) results in degraded even-order

harmonic performance. Connecting two identical RF transformers back-to-back helps minimize this mismatch and

good performance is obtained for high-frequency input signals. An additional termination resistor pair may be

required between the two transformers, as shown in Figure 61 and Figure 62. The center point of this termination

is connected to ground to improve the balance between the P (positive) and M (negative) sides. The values of

the terminations between the transformers and on the secondary side must be chosen to obtain an effective 50Ω

(for a 50Ω source impedance).

Product Folder Link(s): ADS58B18 ADS58B19