Datasheet

INP
INM
5W
5kW
5kW
5W
C
1pF
BOND
L
1nH
PKG
L
1nH
PKG
R
100W
ESR
C
1pF
BOND
R
100W
ESR
R
Buffer
EQ
C
Buffer
EQ
1.7V
R
Buffer
EQ
C
Buffer
EQ
Buffer
Buffer
Sampling
Circuit
ADS58B18
ADS58B19
SBAS487D – NOVEMBER 2009– REVISED JANUARY 2011 www.ti.com
APPLICATION INFORMATION
THEORY OF OPERATION
The ADS58B18 and ADS58B19 are members of the ultralow power ADS4xxx analog-to-digital converter (ADC)
family with integrated analog buffers and SNRBoost technology. The analog-to-digital conversion process is
initiated by a rising edge of the external input clock when the analog input signal is sampled. The sampled signal
is sequentially converted by a series of small resolution stages with the outputs combined in a digital correction
logic block. At every clock edge the sample propagates through the pipeline, resulting in a data latency of 10
clock cycles. The output is available as 11-bit data (ADS58B18) or 9-bit data (ADS58B19), in DDR LVDS or
CMOS, and coded in either offset binary or binary twos complement format.
ANALOG INPUT
The analog inputs include an analog buffer (powered by the AVDD_BUF supply) that internally drives the
differential sampling circuit. As a result of the analog buffer, the input pins present high input impedance to the
external driving source (10kΩ dc resistance and 2pF input capacitance).
The buffer helps to isolate the external driving source from the switching currents of the sampling circuit. With a
constant input impedance, the ADC is easier to drive and to reproduce data sheet measurements. For wideband
applications (such as power amplifier linearization) the signal gain across frequency is more consistent. Spectral
performance variation across the sampling frequency is also reduced.
The input common-mode is set internally using a 5kΩ resistor from each input pin to 1.7V, so the input signal can
be ac-coupled to the pins. For a full-scale differential input, each input pin (INP, INM) must swing symmetrically
between V
CM
+ 0.375V and V
CM
– 0.375V, resulting in a 1.5V
PP
differential input swing. The input sampling circuit
has a high 3dB bandwidth that extends up to 550MHz (measured from the input pins to the sampled voltage).
Figure 58 shows an equivalent circuit for the analog input.
Figure 58. Analog Input Equivalent Circuit
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