Datasheet

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Sampling Speed (MSPS)
DRVDD Power (mW)
ADS58B18
ADS58B19
SBAS487D – NOVEMBER 2009– REVISED JANUARY 2011 www.ti.com
TYPICAL CHARACTERISTICS: ADS58B19 (continued)
At +25°C, AVDD = 1.8V, AVDD_BUF = 3.3V, DRVDD = 1.8V, maximum rated sampling frequency, sine wave input clock,
1.5V
PP
differential clock amplitude, 50% clock duty cycle, –1dBFS differential analog input, DDR LVDS output interface, and
32k-point FFT, unless otherwise noted.
DRVDD POWER vs SAMPLING FREQUENCY
Figure 53.
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Product Folder Link(s): ADS58B18 ADS58B19