Datasheet

1.55 1.60 1.65 1.70 1.75 1.80 1.85
60
62
64
66
68
70
72
74
76
78
80
53
53.5
54
54.5
55
55.5
56
56.5
57
57.5
58
Input Common-Mode Voltage (V)
SFDR (dBc)
SNR (dBFS)
SFDR
SNR
Input Frequency = 170MHz
0 0.5 1 1.5 2 2.5 3 3.5
68
70
72
74
76
78
80
52
53
54
55
56
57
58
Differential Clock Amplitude (V
PP
)
SFDR (dBc)
SNR (dBFS)
SFDR
SNR
Input Frequency = 170MHz
35 40 45 50 55 60 65
70
75
80
85
90
55
55.5
56
56.5
57
Input Clock Duty Cycle (%)
THD (dBc)
SNR (dBFS)
THD
SNR
Input Frequency = 10MHz
100
120
140
160
180
200
220
240
260
280
0 20 40 60 80 100 120 140 160 180 200
Sampling Speed (MSPS)
Analog Power (mW)
Includes AVDD and AVDD_BUF Power
ADS58B18
ADS58B19
www.ti.com SBAS487D – NOVEMBER 2009–REVISED JANUARY 2011
TYPICAL CHARACTERISTICS: ADS58B19 (continued)
At +25°C, AVDD = 1.8V, AVDD_BUF = 3.3V, DRVDD = 1.8V, maximum rated sampling frequency, sine wave input clock,
1.5V
PP
differential clock amplitude, 50% clock duty cycle, –1dBFS differential analog input, DDR LVDS output interface, and
32k-point FFT, unless otherwise noted.
PERFORMANCE ACROSS INPUT COMMON-MODE
VOLTAGE PERFORMANCE ACROSS INPUT CLOCK AMPLITUDE
Figure 49. Figure 50.
PERFORMANCE ACROSS INPUT CLOCK DUTY CYCLE ANALOG POWER vs SAMPLING FREQUENCY
Figure 51. Figure 52.
© 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 41
Product Folder Link(s): ADS58B18 ADS58B19