Datasheet

ADS58B18
ADS58B19
SBAS487D – NOVEMBER 2009– REVISED JANUARY 2011 www.ti.com
Register Address CFh (Default = 00h)
7 6 5 4 3 2 1 0
FREEZE
OFFSET 0 OFFSET CORR TIME CONSTANT 0 0
CORR
Bit 7 FREEZE OFFSET CORR
This bit sets the freeze offset correction.
0 = Estimation of offset correction is not frozen (bit ENABLE OFFSET CORR must be set).
1 = Estimation of offset correction is frozen (bit EN OFFSET CORR must be set). When frozen, the
last estimated value is used for offset correction every clock cycle; see Offset Correction section.
Bit 6 Always write '0'
Bit[5:2] OFFSET CORR TIME CONSTANT
These bits set the offset correction time constant for the correction loop time constant in number of
clock cycles.
TIME CONSTANT
VALUE (Number of Clock Cycles)
0000 1M
0001 2M
0010 3M
0011 4M
0100 16M
0101 32M
0110 64M
0111 128M
1000 256M
1001 512M
1010 1G
1011 2G
Bits[1:0] Always write '0'
Register Address EAh (Default = 00h)
7 6 5 4 3 2 1 0
OVERRIDE
SNBoost_EN 0 0 0 0 0 0 0
PIN
Bit 7 OVERRIDE SNBoost_EN PIN: SNBoost_EN pin override
After reset, the SNRBoost_En pin controls the turning on and off of the SNRBoost function,
independent of the state of register bit SNRBoost Enable. By setting the OVER-RIDE bit to '1', the
register bit can control the SNRBoost function.
0 = SNRBoost_En pin controls SNRBoost function, independent of register bit.
1 = Register bit SNRBoost Enable controls the SNRBoost function, independent of SNRBoost_En
pin.
Bits[6:0] Always write '0'
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