Datasheet

ADS58B18
ADS58B19
www.ti.com SBAS487D – NOVEMBER 2009–REVISED JANUARY 2011
RECOMMENDED OPERATING CONDITIONS
ADS58B18, ADS58B19
MIN TYP MAX UNIT
SUPPLIES
AVDD Analog supply voltage 1.7 1.8 1.9 V
AVDD_BUF Analog buffer supply voltage 3 3.3 3.6 V
DRVDD Digital supply voltage 1.7 1.8 1.9 V
ANALOG INPUTS
Differential input voltage range 1.5 V
PP
Input common-mode voltage 1.7 ± 0.05 V
Maximum analog input frequency with 1.5V
PP
input amplitude
(1)
400 MHz
Maximum analog input frequency with 1V
PP
input amplitude
(1)
600 MHz
CLOCK INPUT
Input clock sample rate: ADS58B18
Enable low speed mode
(2)
30 80 MSPS
Low speed mode disabled (default mode after reset) > 80 200 MSPS
Input clock sample rate: ADS58B19
Enable low speed mode
(2)
30 80 MSPS
Low speed mode disabled (default mode after reset) > 80 250 MSPS
Input clock amplitude differential (V
CLKP
– V
CLKM
)
Sine wave, ac-coupled 0.2 1.5 V
PP
LVPECL, ac-coupled 1.6 V
PP
LVDS, ac-coupled 0.7 V
PP
LVCMOS, single-ended, ac-coupled 1.8 V
Input clock duty cycle 35 50 65 %
DIGITAL OUTPUTS
Maximum external load capacitance from each output pin to
C
LOAD
5 pF
DRGND
Differential load resistance between the LVDS output pairs
R
LOAD
100 Ω
(LVDS mode)
T
A
Operating free-air temperature –40 +85 °C
(1) See the Theory of Operation section in the Application Information.
(2) See the Serial Interface section for details on the low-speed mode.
© 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): ADS58B18 ADS58B19