Datasheet

AVDD
(5/8)AVDD
(3/8)AVDD
3R
2R
3R
(3/8)AVDD
(5/8)AVDD
AVDDGND
ToParallelPin
ADS58B18
ADS58B19
SBAS487D – NOVEMBER 2009– REVISED JANUARY 2011 www.ti.com
DEVICE CONFIGURATION
The ADS58B18/9 have several modes that can be configured using a serial programming interface, as described
in Table 4 through Table 7. In addition, the devices have three dedicated parallel pins for quickly configuring
commonly-used functions. The parallel pins are DFS (analog 4-level control pin), OE (digital control pin), and
SNRBoost_En (digital control pin). The analog control pin can be easily configured using a simple resistor divider
(with 10% tolerance resistors).
Table 4. DFS: Analog Control Pin
DESCRIPTION
VOLTAGE APPLIED ON DFS (Data Format/Output Interface)
0, +100mV/–0mV Twos complement/DDR LVDS
(3/8) AVDD ± 100mV Twos complement/parallel CMOS
(5/8) AVDD ± 100mV Straight binary/parallel CMOS
AVDD, +0mV/–100mV Straight binary/DDR LVDS
Table 5. OE: Digital Control Pin
VOLTAGE APPLIED ON OE DESCRIPTION
0 Output data buffers disabled
AVDD Output data buffers enabled
Table 6. SNRBoost_En: Digital Control Pin (ADS58B18 Only)
VOLTAGE APPLIED ON SNRBoost_En DESCRIPTION
0 SNRBoost disabled
Logic high SNRBoost enabled
When the serial interface is not used, the SDATA pin can also be used as a standby control pin. To enable this,
the RESET pin must be tied high.
Table 7. SDATA: Digital Control Pin
VOLTAGE APPLIED ON SDATA DESCRIPTION
0 Normal operation
Logic high Device enters standby
Figure 11. Simplified Diagram to Configure DFS Pin
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Product Folder Link(s): ADS58B18 ADS58B19