Datasheet

ADS58B18
ADS58B19
SBAS487D – NOVEMBER 2009– REVISED JANUARY 2011 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
SPECIFIED
PACKAGE- PACKAGE TEMPERATURE LEAD/BALL PACKAGE ORDERING TRANSPORT
PRODUCT LEAD DESIGNATOR RANGE ECO PLAN
(2)
FINISH MARKING NUMBER MEDIA
ADS58B18IRGZR Tape and reel
GREEN (RoHS,
ADS58B18 QFN-48 RGZ –40°C to +85°C Cu/NiPdAu AZ58B18
no Sb/Br)
ADS58B18IRGZT Tape and reel
ADS58B19IRGZR Tape and reel
GREEN (RoHS,
ADS58B19 QFN-48 RGZ –40°C to +85°C Cu/NiPdAu AZ58B19
no Sb/Br)
ADS58B19IRGZT Tape and reel
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
(2) Eco Plan is the planned eco-friendly classification. Green (RoHS, no Sb/Br): TI defines Green to mean Pb-Free (RoHS compatible) and
free of Bromine- (Br) and Antimony- (Sb) based flame retardants. Refer to the Quality and Lead-Free (Pb-Free) Data web site for more
information.
ABSOLUTE MAXIMUM RATINGS
(1)
ADS58B18, ADS58B19
MIN MAX UNIT
Supply voltage range, AVDD –0.3 2.1 V
Supply voltage range, AVDD_BUF –0.3 3.9 V
Supply voltage range, DRVDD –0.3 2.1 V
Voltage between AGND and DRGND –0.3 0.3 V
Voltage between AVDD to DRVDD (when AVDD leads DRVDD) –2.4 2.4 V
Voltage between DRVDD to AVDD (when DRVDD leads AVDD) –2.4 2.4 V
Voltage between AVDD_BUF to DRVDD/AVDD –4.2 4.2 V
minimum
INP, INM –0.3 V
(1.9, AVDD + 0.3)
Voltage applied to input pins
CLKP, CLKM
(2)
, RESET, SCLK,
–0.3 AVDD + 0.3 V
SDATA, SEN, DFS, SNRBoost_En
Operating free-air temperature range, T
A
–40 +85 °C
Operating junction temperature range, T
J
+125 °C
Storage temperature range, T
stg
–65 +150 °C
ESD, human body model (HBM) 2 kV
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
(2) When AVDD is turned off, it is recommended to switch off the input clock (or ensure the voltage on CLKP, CLKM is less than |0.3V|.
Doing so prevents the ESD protection diodes at the clock input pins from turning on.
THERMAL INFORMATION
ADS58B18
THERMAL METRIC
(1)
RGZ UNITS
48 PINS
θ
JA
Junction-to-ambient thermal resistance 29
θ
JCtop
Junction-to-case (top) thermal resistance n/a
θ
JB
Junction-to-board thermal resistance 10
°C/W
ψ
JT
Junction-to-top characterization parameter 0.3
ψ
JB
Junction-to-board characterization parameter 9
θ
JCbot
Junction-to-case (bottom) thermal resistance 1.13
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
2 Submit Documentation Feedback © 2009–2011, Texas Instruments Incorporated
Product Folder Link(s): ADS58B18 ADS58B19