Datasheet

www.ti.com
SERIAL PROGRAMMING INTERFACE CHARACTERISTICS
A3
ADDRESS
SDATA
MSB
DATA
A2 A1 A0 D11 D10 D9 D0
16 x M
MSB LSB LSBMSB
SCLK
SEN
SDATA
t
SLOADS
t
SLOADH
t
SCLK
t
WSCLK
t
WSCLK
t
su(D)
t
h(D)
Production Data
ADS5541
SBAS307C MAY 2004 REVISED FEBRUARY 2007
The ADS5541 has a three-wire serial interface. The device latches the serial data SDATA on the falling edge of
serial clock SCLK when SEN is active.
Serial shift of bits is enabled when SEN is low. SCLK shifts serial data at the falling edge.
Minimum width of data stream for a valid loading is 16 clocks.
Data is loaded at every 16th SCLK falling edge while SEN is low.
In case the word length exceeds a multiple of 16 bits, the excess bits are ignored.
Data can be loaded in multiples of 16-bit words within a single active SEN pulse.
The first 4-bit nibble is the address of the register while the last 12 bits are the register contents.
Figure 3. DATA Communication is 2-Byte, MSB First
Figure 4. Serial Programming Interface Timing Diagram
Table 1. Serial Programming Interface Timing Characteristics
ADS5541
SYMBOL PARAMETER MIN
(1)
TYP
(1)
MAX
(1)
UNIT
t
SCLK
SCLK period 50 ns
t
WSCLK
SCLK duty cycle 25 50 75 %
t
SLOADS
SEN to SCLK setup time 8 ns
t
SLOADH
SCLK to SEN hold time 6 ns
t
SY(D)
Data setup time 8 ns
t
H(D)
Data hold time 6 ns
(1) Values are characterized, but not production tested.
8
Submit Documentation Feedback