Datasheet

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500mA f
S
(in MSPS)
105 MSPS
(5)
R
0
50
Z
0
50
1:1
INP
INM
CM
ADT1−1WT
R
50
1nF 0.1
µ
F
AC Signal
Source
10
25
25
ADS5541
Production Data
ADS5541
SBAS307C MAY 2004 REVISED FEBRUARY 2007
This differential input topology produces a high level The single-ended signal is fed to the primary winding
of ac performance for high sampling rates. It also of an RF transformer. Placing a 25 resistor in
results in a very high usable input bandwidth, series with INP and INM is recommended to dampen
especially important for high intermediate-frequency ringing because of ADC kickback. Since the input
(IF) or undersampling applications. The ADS5541 signal must be biased around the common-mode
requires each of the analog inputs (INP, INM) to be voltage of the internal circuitry, the common-mode
externally biased around the common-mode level of voltage (V
CM
) from the ADS5541 is connected to the
the internal circuitry (CM, pin 17). For a full-scale center-tap of the secondary winding. To ensure a
differential input, each of the differential lines of the steady low-noise V
CM
reference, best performance is
input signal (pins 19 and 20) swing symmetrically attained when the CM output (pin 17) is filtered to
between CM + 0.575V and CM 0.575V. This ground with a 10 series resistor and parallel 0.1 µ F
means that each input is driven with a signal of up to and 0.001 µ F low-inductance capacitors as illustrated
CM ± 0.575V, so that each input has a maximum in Figure 39 .
differential signal of 1.15V
PP
for a total differential
Output V
CM
(pin 17) is designed to directly drive the
input signal swing of 2.3V
PP
. The maximum swing is
ADC input. When providing a custom CM level, be
determined by the two reference voltages, the top
aware that the input structure of the ADC sinks a
reference (REFP, pin 29) and the bottom reference
common-mode current in the order of 500 µ A (250 µ A
(REFM, pin 30).
per input) at 105MSPS. Equation 5 describes the
The ADS5541 gives optimum performance when the dependency of the common-mode current and the
analog inputs are driven differentially. The circuit sampling frequency:
shown in Figure 40 illustrates one possible
configuration using an RF transformer.
Where:
f
S
> 2MSPS.
This equation helps to design the output capability
and impedance of the driving circuit accordingly.
Figure 40. Transformer Input to Convert Single-Ended Signal to Differential Signal
22
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