Datasheet

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Input Amplitude (dBFS)
−30
−20
−10
0
10
20
30
40
50
60
70
80
90
100
−100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0
f
IN
= 150MHz
AC Performance (dB)
SNR (dBc)
SFDR (dBc)
SNR (dBFS)
Input Amplitude (dBFS)
−30
−20
−10
0
10
20
30
40
50
60
70
80
90
100
−100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0
f
IN
= 220MHz
AC Performance (dB)
SNR (dBc)
SFDR (dBc)
SNR (dBFS)
0
5
10
15
20
25
30
35
40
45
8195 8196 8197 8198 8199 8200 8201 8201 8203
Code
Occurrence (%)
39.24
0.03
0.53
5.61
23.97
24.31
5.8
0.51
0.01
Differential Clock Amplitude (V)
65
70
75
80
85
90
95
0.0 0.5 1.0 1.5 2.0 2.5 3.0
f
IN
= 70MHz
SNR
SFDR
SNR (dBFS) SFDR (dBc)
Frequency (MHz)
−140
−120
−100
−80
−60
−40
−20
0
0 5 10 15 20 25 30 35 40 45 50
Amplitude (dB)
Clock Duty Cycle (%)
65
70
75
80
85
90
95
40 45 50 55 60
f
IN
= 20MHz
SNR
SFDR
SNR (dBFS) SFDR (dBc)
Production Data
ADS5541
SBAS307C MAY 2004 REVISED FEBRUARY 2007
TYPICAL CHARACTERISTICS (continued)
At T
A
= +25°C, AV
DD
= DRV
DD
= 3.3V, sampling rate = 105MSPS, 50% clock duty cycle, DLL On, 3V
PP
differential clock, and
–1dBFS differential input, unless otherwise noted.
AC PERFORMANCE vs INPUT AMPLITUDE AC PERFORMANCE vs INPUT AMPLITUDE
Figure 29. Figure 30.
AC PERFORMANCE vs DIFFERENTIAL CLOCK
OUTPUT NOISE HISTOGRAM AMPLITUDE
Figure 31. Figure 32.
WCDMA CARRIER AC PERFORMANCE vs CLOCK DUTY CYCLE
Figure 33. Figure 34.
18
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