Datasheet

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0 10M 20M 30M 40M 50M 60M 70M 80M 90M 100M 110M 124.5
f-Frequency-Hz
dBFs
SNR=71.91dBFs,
SINAD=71.78dBFs,
SFDR=87.96dBc,
THD=87.07DBFs,
ENOB=11.63bits
4.3 Test Result With Onboard VCXO and Clock Through Crystal Filter
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0 10M 20M 30M 40M 50M 60M 70M 80M 90M 100M 110M 122.86
dBFs
f-Frequency-Hz
SNR=71.97dBFs,
SINAD=71.84dBFs,
SFDR=88.83dBc,
THD=87.06DBFs,
ENOB=11.64bits
Evaluation www.ti.com
Figure 7. Quick-Setup Test Result.
This test uses the VCXO of frequency 983.04 MHz. This setup uses the Power Option 2 (Table 3 ), Clock
Option 2 (Table 5 ), and Analog Input Option 1 (Table 7 ). For this test, the CDCE72010 crystal filter path
was chosen to provide the clock to the ADC. The CDCE72010 provides a single-ended clock through
output Y0 (Table 5 ), which is passed through a crystal filter of center frequency 245.76 MHz. This was the
example setup; the VCXO and the crystal filter are not populated on the EVM as the values depend on the
end-application sampling rate. The capture result for ADS6149 is as shown in Figure 8 .
Figure 8. ADC Performance With Clock Through Onboard VCXO, CDCE72010, and Crystal Filter
ADS61x9/55xxEVM 20 SLWU061A – December 2008 – Revised June 2009
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