Datasheet

Dia.1 Dia.2 Dia.3

Dia.4 Dia.5

Board Configuration

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Table 3. ADC Clock Various Mode Jumper Settings

Reference

Clock Type Jumper Setting Diagram

Designator

Onboard CMOS JP13, JP19, JP20, JP13 (1-2), JP20 (2-3), JP19 (1-2), JP16 (2-3), Dia. 1

Oscillator JP16, JP18 JP18 (2-3) (Default Option)

Single Ended

External CMOS J8, JP19, JP20, JP16, JP20 (2-3), JP19 (2-3), JP16 (2-3), JP18 (2-3) Dia. 2

Clock Generator JP18 and Connect CMOS clock generator output at

SMA connector J8.

Transformer Based JP15, JP17, JP16, JP15 (1-2), JP16 (1-2),JP17 (1-2), JP18 (1-2), Dia. 3

External JP18, J4 and Connect external Clock source at SMA

connector J4

Onboard Clock JP13, JP19, JP20, JP13 (1-2), JP20 (1-2), JP19 (1-2), JP15 (2-3), Dia. 4

Buffer JP15, JP17, JP16, JP17 (2-3), JP16 (1-2), JP18 (1-2).

(CDCLVP1102,U4) JP18

Differential This configures the onboard CMOS oscillator

Clock Signal as clock input to buffer.

J8, JP19, JP20, JP15, JP19 (2-3), JP20 (1-2), JP15 (2-3), JP17 (2-3), Dia. 5

JP17, JP16, JP18 JP16 (1-2), JP18 (1-2) and Connect External

CMOS generator output at SMA connector J8.

This configures the external CMOS source as

clock input to buffer.

ADS5295, 8-Channel, Analog-to-Digital Converter Evaluation Module SLAU442–November 2012

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