Datasheet

JP16
JP18
JP15
J5
JP20
JP17
JP13
JP19
J8
J4
J16
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9.2 ADC Clock
Five options are available for the source of the ADC clocks. Refer to Table 3 for details. In Figure 12,
ADS5292EVM uses an onboard, single-ended clock as the default option.
Figure 12. ADS5292EVM Default Clock Jumper Locations
Table 3. ADC Clock Various Mode Jumper Settings
Reference
Clock Type Jumper Setting Diagram
Designator
Onboard CMOS JP13, JP19, JP20, JP13 (1-2), JP20 (2-3), JP19 (1-2), JP16 (2-3), Dia. 1
Oscillator JP16, JP18 JP18 (2-3) (Default Option)
Single Ended
External CMOS J8, JP19, JP20, JP16, JP20 (2-3), JP19 (2-3), JP16 (2-3), JP18 (2-3) Dia. 2
Clock Generator JP18 and Connect CMOS clock generator output at
SMA connector J8.
18
ADS5292, 8-Channel, Analog-to-Digital Converter Evaluation Module SLAU377–October 2011
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