Datasheet
VREF =1.5V -
B
V
CM
1.5V
VREF =1.5V+
T
V
CM
1.5V
REF
T
REF
B
I
SET
0.1 Fm 2.2 Fm
0 to
2
W
W
0 toW
2W
56.2kW
2.2 Fm 0.1 Fm
ADS528x
ADS5281
ADS5282
www.ti.com
SBAS397I –DECEMBER 2006–REVISED JUNE 2012
resistor at I
SET
reduces the reference bias current and The device also supports the use of external
thereby scales down the device operating power. reference voltages. There are two methods to force
However, it is recommended that the external resistor the references externally. The first method involves
be within 10% of the specified value of 56.2kΩ so pulling INT/EXT low and forcing externally REF
T
and
that the internal bias margins for the various blocks REF
B
to 2.5V and 0.5V nominally, respectively. In this
are proper. mode, the internal reference buffer goes to a 3-state
output. The external reference driving circuit should
Buffering the internal bandgap voltage also generates
be designed to provide the required switching current
the common-mode voltage V
CM
, which is set to the
for the eight ADCs inside the chip. It should be noted
midlevel of REF
T
and REF
B
, and is accessible on a
that in this mode, V
CM
and I
SET
continue to be
pin (pin 65 in TQFP-80 package, pin 53 in QFN-64
generated from the internal bandgap voltage, as in
package). It is meant as a reference voltage to derive
the internal reference mode. It is therefore important
the input common-mode if the input is directly
to ensure that the common-mode voltage of the
coupled. It can also be used to derive the reference
externally-forced reference voltages matches to
common-mode voltage in the external reference
within 50mV of V
CM
.
mode. The suggested decoupling for the reference
pins is shown in Figure 43. The second method of forcing the reference voltages
externally can be accessed by pulling INT/EXT low,
and programming the serial interface to drive the
external reference mode through the V
CM
pin (register
bit called EXT_REF_VCM). In this mode, V
CM
becomes configured as an input pin that can be
driven from external circuitry. The internal reference
buffers driving REF
T
and REF
B
are active in this
mode. Forcing 1.5V on the V
CM
pin in the mode
results in REF
T
and REF
B
coming to 2.5V and 0.5V,
respectively. In general, the voltages on REF
T
and
REF
B
in this mode are given by Equation 4 and
Equation 5, respectively:
(4)
Figure 43. Suggested Decoupling on the
Reference Pins
(5)
The state of the reference voltage internal buffers
during various combinations of the PD, INT/EXT, and
EXT_REF_VCM register bits is described in Table 8.
Table 8. State of Reference Voltages for Various Combinations of PD, INT/EXT, and EXT_REF_VCM
REGISTER BIT INTERNAL BUFFER STATE
PD 0 0 1 1 0 0 1 1
INT/EXT 0 1 0 1 0 1 0 1
EXT_REF_VCM 0 0 0 0 1 1 1 1
REF
T
buffer 3-state 2.5V 3-state 2.5V
(1)
1.5V + V
CM
/1.5V Do not use 2.5V
(1)
Do not use
REF
B
buffer 3-state 0.5V 3-state 0.5V
(1)
1.5V – V
CM
/1.5V Do not use 0.5V
(1)
Do not use
V
CM
pin 1.5V 1.5V 1.5V 1.5V Force Do not use Force Do not use
(1) Weakly forced with reduced strength.
sections, while LVDD and LVSS are used to denote
the digital supplies. Care is taken to ensure that there
NOISE COUPLING ISSUES
is minimal interaction between the supply sets within
High-speed mixed signals are sensitive to various
the device. The extent of noise coupled and
types of noise coupling. One primary source of noise
transmitted from the digital to the analog sections
is the switching noise from the serializer and the
depends on:
output buffers. Maximum care is taken to isolate
1. The effective inductances of each of the supply
these noise sources from the sensitive analog blocks.
and ground sets.
As a starting point, the analog and digital domains of
2. The isolation between the digital and analog
the device are clearly demarcated. AVDD and AVSS
supply and ground sets.
are used to denote the supplies for the analog
Copyright © 2006–2012, Texas Instruments Incorporated 37