Datasheet

95
85
75
65
55
45
35
25
InputAmplitude(dBFS)
DynamicPerformance(SNR,SFDR)
SNR(dBFS)
SFDR(dBc)
f =65MHz
f =10MHz
S
IN
-60 0-50 -40 -30 -20 -10
94
89
84
79
74
69
ClockAmplitude(V Differential)
PP
0.6 2.3
DynamicPerformance(SNR,SFDR)
1.61.1
SNR(dBFS)
SFDR(dBc)
f =65MHz
f =10MHz
S
IN
2.1
95
90
85
80
75
70
65
60
DigitalGain(dB)
0 12
DynamicPerformance(SNR,SFDR)
642 8
SNR(dBFS)
SFDR(dBc)
f =65MHz
f =10MHz
S
IN
10
95
90
85
80
75
70
65
60
AVDD(V)
3.0 3.6
DynamicPerformance(SNR,SFDR)
3.33.23.1 3.4
SNR(dBFS)
SFDR(dBc)
f =65MHz
f =10MHz
S
IN
3.5
92
87
82
77
72
67
InputFrequency(MHz)
5 30
DynamicPerformance(SNR,SFDR)
201510 25
SNR(dBFS)
SFDR(dBc)
f =50MHz
S
97
92
87
82
77
72
67
InputFrequency(MHz)
5 30
DynamicPerformance(SNR,SFDR)
201510 25
SNR(dBFS)
SFDR(dBc)
f =65MHz
S
ADS5281
ADS5282
SBAS397I –DECEMBER 2006–REVISED JUNE 2012 www.ti.com
TYPICAL CHARACTERISTICS (continued)
At T
A
= +25°C, AVDD = +3.3V, LVDD = 1.8V, clock frequency = 65MSPS, differential clock mode, 1V
PP
clock amplitude, 50%
clock duty cycle, input frequency = 10MHz, –1dBFS differential analog input, 0dB digital gain setting, 1.5V analog input
common-mode, low-frequency noise suppression = off, internal reference mode, I
SET
resistor = 56.2kΩ, and LVDS buffer
current setting = 3.5mA, unless otherwise noted.
DYNAMIC PERFORMANCE vs INPUT FREQUENCY DYNAMIC PERFORMANCE vs INPUT FREQUENCY
Figure 12. Figure 13.
DYNAMIC PERFORMANCE vs DIGITAL GAIN DYNAMIC PERFORMANCE vs AVDD
Figure 14. Figure 15.
DYNAMIC PERFORMANCE vs INPUT AMPLITUDE DYNAMIC PERFORMANCE vs CLOCK AMPLITUDE
Figure 16. Figure 17.
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