Datasheet

12-Bit
ADC
PLL
Serializer
1xADCLK
6xADCLK
IN1
P
IN1
N
OUT1
P
OUT1
N
12-Bit
ADC
Serializer
IN2
P
IN2
N
OUT2
P
OUT2
N
12-Bit
ADC
Serializer
IN3
P
IN3
N
OUT3
P
OUT3
N
LCLK
P
LCLK
N
ADCLK
P
ADCLK
N
12xADCLK
12-Bit
ADC
Serializer
IN4
P
IN4
N
OUT4
P
OUT4
N
12-Bit
ADC
Serializer
IN5
P
IN5
N
OUT5
P
OUT5
N
12-Bit
ADC
Serializer
IN6
P
IN6
N
OUT6
P
OUT6
N
12-Bit
ADC
Serializer
IN7
P
IN7
N
OUT7
P
OUT7
N
12-Bit
ADC
Serializer
Digital
Digital
Digital
Digital
Digital
Digital
Digital
Digital
Reference
IN8
P
IN8
N
REF
T
INT/
EXT
REF
B
V
CM
OUT8
P
OUT8
N
I
SET
Registers
SDATA
CS
RESET
SCLK
ADC
Control
PD
Clock
Buffer
(ADCLK)
CLK
P
(AVSS)
CLK
N
AVDD
(3.3V)
LVDD
(1.8V)
Power-
Down
TestPatterns
DriveCurrent
OutputFormat
DigitalGain
(0dB-12dB)
ADS5281
ADS5282
www.ti.com SBAS397I –DECEMBER 2006–REVISED JUNE 2012
FUNCTIONAL BLOCK DIAGRAM
Copyright © 2006–2012, Texas Instruments Incorporated 11