ADS5102/3 EVM User’s Guide December 2001 AAP High-Speed Data Converter (Dallas) SLAU077
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the specified input and output ranges as described in the EVM user’s guide. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Information About Cautions and Warnings Preface Read This First About This Manual This user’s guide is to assist the user with the operation of the EVM using the ADS5102/3 devices. How to Use This Manual This document contains the following chapters: - Chapter 1—Overview - Chapter 2—Physical Description - Chapter 3—Circuit Description Information About Cautions and Warnings This book may contain cautions and warnings. This is an example of a caution statement.
Contents FCC Warning This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference.
Contents Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 EVM Basic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Power Requirements . . . . . . . . . . . . . . . . .
Contents Tables 1–1 1–2 2–1 3–1 3–2 Two Pin Jumper List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Three Pin Jumper List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reference Voltage Adjustment Ranges . . . . . . . . . .
Chapter 1 Overview This user’s guide gives a general overview of the ADS5102/3 evaluation module (EVM) and provides a general description of the features and functions to be considered while using this module. Topic Page 1.1 Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 EVM Basic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.3 Power Requirements . . . . . . . . . . . .
Purpose 1.1 Purpose The ADS5102/3 EVM provides a platform for evaluating the ADS5102/3 analog-to-digital converter (ADC) under various signal, reference, and supply conditions. Use this document in combination with the EVM schematic diagram supplied. 1.2 EVM Basic Functions Analog input to the ADC is provided via two external SMA connectors. The single-ended input the user provides is converted into a differential signal at the input of the device.
ADS5102/3 EVM Operational Procedure 1.4 ADS5102/3 EVM Operational Procedure The ADS5102/3 EVM provides a flexible means of evaluating the ADS5102/3 in a number of modes of operation. A basic setup procedure that can be used as a board confidence check is as follows: 1) Verify all jumper settings against the schematic jumper list in Table 1–1 and Table 1–2: Table 1–1.
ADS5102/3 EVM Operational Procedure 3) Switch power supplies on. 4) Use a function generator with 50-Ω output to input a 40-MHz, 1.5-V offset, 3-V(p-p) amplitude square wave signal into J3 to be used as the ADC clock. Note: The frequency of the clock must be within the specification for the device speed grade. 5) Use a function generator with 50-Ω output to input a 1.5-V offset, 3-V(p-p) amplitude square wave signal into J4 to be used as the buffered output clock.
Chapter 2 Physical Description This chapter describes the physical characteristics and PCB layout of the EVM and lists the components used on the module. Topic Page 2.1 PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.2 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCB Layout 2.1 PCB Layout The EVM is constructed on a 4-layer, 104 mm (4.1 inch) x 114 mm (4.5 inch) x 1,57 mm (0.062 inch) thick PCB using FR–4 material. Figure 2–1 through Figure 2–4 show the individual layers. Figure 2–1.
PCB Layout Figure 2–2.
PCB Layout Figure 2–3.
Bill of Materials Figure 2–4. Bottom Layer 2.2 Bill of Materials Table 2–1 lists the parts used in constructing the EVM. Table 2–1. Bill of Materials Description Part Number MFG. REF DES 47 µF, tantalum, 10%, 10 V QTY 5 10TPA47M SANYO C72–C76 0.1 µF,16 V, 10% capacitor 31 ECJ–1VB1C104K Panasonic C12–C37, C62–C66 10 µF, 10 V, 10% capacitor 9 GRM42X5R106K10 Murata C51–C54, C67–C71 0.01 µF, 50 V,10% capacitor 4 AVX C47–C49 C60 1.
Bill of Materials Table 2–1. Bill of Materials (Continued) Description Qty. Part Number Mfg. Ref. Des. 470 pF,16 V, 10% capacitor 5 C3–C7 2.2 µF,16 V, 10% capacitor 1 C61 Ferrite bead 5 499-Ω resistor, 1/16 W, 1% 3 ERJ–3EKF499R0V Panasonic R9–R11 523-Ω resistor, 1/16 W, 1% 1 ERJ–3EKF523R0V Panasonic R12 49.9-Ω resistor, 1/16 W, 1% 9 ERJ–3EKF49R9V Panasonic R1–R8, R13 1-kΩ resistor, 1/16 W, 1% 2 R21, R22 2.
Chapter 3 Circuit Description This chapter describes the circuit function and shows the schematic for the EVM. Topic Page 3.1 Circuit Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3.2 Schematic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Circuit Function 3.1 Circuit Function The following paragraphs describe the function of the individual circuits. See the data sheet for device operating characteristics. 3.1.1 Analog Inputs The ADC has either transformer-coupled inputs or differential-amplifier inputs from a single-ended source. The inputs are provided via the SMA connectors J1 and J2 on the EVM, which must be configured as follows: - For a differential amplifier input to the ADC, a single ended source is connected to J1.
Thefollowingparagraphsdescribethefunctionoftheindividualcircuits.Seethedatasheetfordeviceoperatingcharacteristics. 3.1.3 Clock Inputs The EVM provides separate inputs for the ADC clock and output buffer clock. This allows the user to send a modified version of the ADC clock (inverted, delayed, etc.) with the output data to generate the required setup and hold times for the user interface. The ADC clock input is SMA connector J3 and has provisions for serial and/or parallel termination.
Schematic Diagram Table 3–2.
1 2 3 4 5 6 Revision History R10 499 REV ECN Number Approved C1 +5VA 1.8 pF 7 J1 AIN /PD R9 1 8 0.1 uF AVDD D (Note 1) R36 R2 5 49.9 4 - C41 C14 1.0 uF 0.1 uF 1.0 uF 0.1 uF AIN- 0 22 pF VOUT+ 1 C13 R37 C38 VOCM R1 49.9 C40 0 VOUT- 2 5 4 3 2 C12 470 pF +VCC + 499 C3 3 U1 THS4141 D R3 R38 49.9 0 (Note 1) AIN+ DVDD -VCC C39 -5VA C47 C16 0.01 uF 0.1 uF 6 R12 523 R39 0 22 pF C5 C18 470 pF 0.1 uF C2 C20 C43 0.1 uF 1.0 uF 1.
1 2 3 4 5 6 +5VA D TP1 R21 C26 0.1 uF D C7 470 pF 4 1 1K R18 R30 2 1k 10 uF W10 R5 1 2 C51 3 + U3A OPA4227UA 3 100 10K C24 0.1 uF C55 0.047 uF C25 0.1 uF REFT 49.9 0.1% -5VA 11 R27 R33 2.0 K C6 470 pF C48 C58 0.01 uF 1 uF (1.25V TYP) REFT R22 1K +5VA TP2 U4 C IN OUT 5 R23 +2.5V 3 1 2.49K + C52 10 uF C77 1 uF 2 C R28 C61 2.2 uF GND R19 2 10K 100 1k EN BYPASS 4 + C53 1 3 R31 U3C 10 REFB 49.9 0.1% OPA4227UA C56 0.
1 2 TP4 D 3 4 5 TP7 ADC Analog Supply (+1.8V) +1.8VA-PS D +5VA-PS AVDD FB1 J6 BANANA_JACK 6 +5VA FB2 J7 C29 C62 + 0.1 uF C72 47 uF + C67 10 uF C63 BANANA_JACK C30 + 0.1 uF J5 0.1 uF C73 47 uF + C68 10 uF 0.1 uF J8 BANANA_JACK BANANA_JACK Analog Supply (+/-5volts) for Ext. Components TP5 TP8 ADC Digital Supply (+1.8V) +1.8VD-PS -5VA-PS DVDD BANANA_JACK -5VA C31 C64 + 0.1 uF C74 47 uF + C69 10 uF C FB4 J11 C65 BANANA_JACK 0.1 uF C32 0.
1 2 3 4 5 6 D D DRVDD C35 C36 C37 0.1 uF 0.1 uF 0.1 uF 0.
