Datasheet

TSW1400
ADS42xx/
58C28EVM
LVDS
AIN_A/B
CLK IN
+5V
Mini-USB
PC
(HSDC Pro)
Signal
Generator
Signal
Generator
+5V
Mini-USB
J17
J23
J19
J6/J3
J5
J12
J4
J13
www.ti.com Basic Test Procedure
2 Basic Test Procedure
This section outlines the basic test procedure for testing the EVM.
2.1 Test Block Diagram
The test set-up for general testing of the EVM with the TSW1400 capture card is shown in Figure 3.
Figure 3. Test Set-Up Block Diagram
2.2 Verify Board Set-up
Verify jumper settings are in the correct position as outlined in Table 1.
Table 1. Default ADS42xx/58C28 EVM Rev B Jumper Setting for Serial
Interface
(1)
Jumper Default position Function
JP15 Short 1 - 2 DC supply
JP16 Short 1 - 2 DC supply
JP17 Short 2 - 3 DC supply, LDO
JP19 Short 3 - 2 DC supply, LDO
JP28 Short 3 - 2 DC supply, LDO
JP29 Short 3 - 2 DC supply, LDO
JP26 Open DC supply for external buffer
JP27 Open DC supply for external buffer
JP3 Short 2 - 3 OPA power down
JP4 Short 2 - 3 OPA power down
JP22 Open SDOUT to FPGA
JP20 Short 1 - 2 CDC
JP21 Short 1 - 2 CDC
J14 Short 1 - 2 CDC power down
J18 Open CDC, VCXO
JP8 Short 3 - 2 ADC SCLK for SPI
JP9 Short 3 - 2 ADC SDATA for SPI
JP10 Short 3 - 2 ADC SEN for SPI
JP11 Short 3 - 2 ADC for SPI, also reset
JP 12 Short 1 - 2 ADC low -speed mode disable
(1)
The EVM schematic shows the default setting of JP8 to JP11 as parallel interface (Table 2), which is
for EVM installation. After EVM tested and released, these jumpers are set as serial interface (Table 1).
5
SLAU333A–March 2011–Revised June 2013 ADS42xx EVM
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