Datasheet
ADS41B29
ADS41B49
www.ti.com
SBAS486E – NOVEMBER 2009–REVISED JULY 2012
GAIN FOR SFDR/SNR TRADE-OFF
The ADS41B29/49 include gain settings that can be used to get improved SFDR performance. The gain is
programmable from 0dB to 3.5dB (in 0.5dB steps) using the GAIN register bits. For each gain setting, the analog
input full-scale range scales proportionally, as shown in Table 8.
The SFDR improvement is achieved at the expense of SNR; for each gain setting, the SNR degrades
approximately between 0.5dB and 1dB. The SNR degradation is reduced at high input frequencies. As a result,
the gain is very useful at high input frequencies because the SFDR improvement is significant with marginal
degradation in SNR. Therefore, the gain can be used to trade-off between SFDR and SNR.
After a reset, the gain is enabled with 0dB gain setting. For other gain settings, program the GAIN register bits.
Table 8. Full-Scale Range Across Gains
GAIN (dB) TYPE FULL-SCALE (V
PP
)
0 Default after reset 1.5
0.5 Programmable gain 1.41
1 Programmable gain 1.33
1.5 Programmable gain 1.26
2 Programmable gain 1.19
2.5 Programmable gain 1.12
3 Programmable gain 1.06
3.5 Programmable gain 1
OFFSET CORRECTION
The ADS41B29/49 has an internal offset corretion algorithm that estimates and corrects dc offset up to ±10mV.
The correction can be enabled using the EN OFFSET CORR serial register bit. Once enabled, the algorithm
estimates the channel offset and applies the correction every clock cycle. The time constant of the correction
loop is a function of the sampling clock frequency. The time constant can be controlled using the OFFSET CORR
TIME CONSTANT register bits, as described in Table 9.
Table 9. Time Constant of Offset Correction Loop
TIME CONSTANT, TC
CLK
OFFSET CORR TIME CONSTANT (Number of Clock Cycles) TIME CONSTANT, TC
CLK
× 1/f
S
(sec)
(1)
0000 1M 4ms
0001 2M 8ms
0010 4M 16.7ms
0011 8M 33.5ms
0100 16M 67ms
0101 32M 134ms
0110 64M 268ms
0111 128M 537ms
1000 256M 1.1s
1001 512M 2.15s
1010 1G 4.3s
1011 2G 8.6s
1100 Reserved —
1101 Reserved —
1110 Reserved —
1111 Reserved —
(1) Sampling frequency, f
S
= 250MSPS.
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Product Folder Link(s): ADS41B29 ADS41B49