Datasheet

5W
5W
0.1 Fm
0.1 Fm
T2
1:1
T1
1:1
50W
50W
INP
INM
50W
50W
5W
5W
0.1 Fm
0.1 Fm
T1
1:1
25W
25W
INP
INM
ADS41B29
ADS41B49
www.ti.com SBAS486E – NOVEMBER 2009–REVISED JULY 2012
Driving Circuit
Two example driving circuit configurations are shown in Figure 62 and Figure 63—one optimized for low input
frequencies and the other optimized for high input frequencies. Notice in both cases that the board circuitry is
simplified compared to the non-buffered ADS4149.
In Figure 62, a single transformer is used and is suited for low input frequencies. To optimize even-harmonic
performance at high input frequencies (greater than the first Nyquist), the use of back-to-back transformers is
recommended (see Figure 63). Note that both drive circuits have been terminated by 50Ω near the ADC side.
The ac-coupling capacitors allow the analog inputs to self-bias around the required common-mode voltage.
Figure 62. Drive Circuit for Low Input Frequencies
Figure 63. Drive Circuit for High Input Frequencies
The mismatch in the transformer parasitic capacitance (between the windings) results in degraded even-order
harmonic performance. Connecting two identical RF transformers back-to-back helps minimize this mismatch and
good performance is obtained for high-frequency input signals. An additional termination resistor pair may be
required between the two transformers, as shown in Figure 62 and Figure 63. The center point of this termination
is connected to ground to improve the balance between the P (positive) and M (negative) sides. The values of
the terminations between the transformers and on the secondary side must be chosen to obtain an effective 50Ω
(for a 50Ω source impedance).
Copyright © 2009–2012, Texas Instruments Incorporated Submit Documentation Feedback 45
Product Folder Link(s): ADS41B29 ADS41B49