Datasheet

5
4
3
2
1
0
0
0.7
Frequency (GHz)
C (pF)
IN
0.1 0.4 0.5 0.60.30.2
C Simulation
IN
C Measurement
IN
10
1
0.1
0.01
0
0.7
Frequency (GHz)
R (k )W
IN
0.1 0.4 0.5 0.60.30.2
R Simulation
IN
R Measurement
IN
ADS41B29
ADS41B49
SBAS486E – NOVEMBER 2009–REVISED JULY 2012 www.ti.com
Drive Circuit Requirements
For optimum performance, the analog inputs must be driven differentially. This technique improves the common-
mode noise immunity and even-order harmonic rejection. A small resistor (5Ω to 10Ω) in series with each input
pin is recommended to damp out ringing caused by package parasitics.
Figure 60 and Figure 61 show the differential impedance (Z
IN
= R
IN
|| C
IN
) seen by looking into the ADC input
pins. The presence of the analog input buffer results in an almost constant input capacitance up to 1GHz.
Figure 60. ADC Analog Input Resistance (R
IN
) Across Frequency
Figure 61. ADC Analog Input Capacitance (C
IN
) Across Frequency
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Product Folder Link(s): ADS41B29 ADS41B49