Datasheet

5020 100 150 200
In ueput F eqr ncy (MHz)
SamplingFrequency(MSPS)
SFDR(dBc)
250 300 350 450400 500
80
160
100
120
140
180
250
65
240
220
200
64
64
68
68
68
72
72
72
76
76
76
80
80
80
83
83
83
86
86
86
86
86
89
89
89
80757065 85
5020 100 150 200
In ueput F eqr ncy (MHz)
SamplingFrequency(MSPS)
SFDR(dBc)
250 300 350 450400 500
80
160
100
120
140
180
250
80757065 85
65
60
60
60
60
64
64
64
68
68
68
72
72
72
76
76
76
80
80
80
83
83
83
83
86
86
86
86
89
89
89
89
240
220
200
ADS41B29
ADS41B49
SBAS486E – NOVEMBER 2009–REVISED JULY 2012 www.ti.com
TYPICAL CHARACTERISTICS: CONTOUR
At +25°C, AVDD = 1.8V, AVDD_BUF = 3.3V, DRVDD = 1.8V, maximum rated sampling frequency, sine wave input clock,
1.5V
PP
differential clock amplitude, 50% clock duty cycle, –1dBFS differential analog input, DDR LVDS output interface, and
32k-point FFT, unless otherwise noted.
SFDR CONTOUR
(0dB Gain, Applies to ADS41B29/B49)
Figure 53.
SFDR CONTOUR
(3.5dB Gain, Applies to ADS41B29/B49)
Figure 54.
40 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated
Product Folder Link(s): ADS41B29 ADS41B49