Datasheet

120-
Frequency(MHz)
0 50
Amplitude(dB)
10 20 30 40
f =10MHz
=1MHz,50mV
Amplitude(f )= 1dBFS
Amplitude( )= 65.6
Amplitude(f + )= 67.5
Amplitude(f )= 68.3
IN
PP
f
f
f
PSRR
IN
IN PSRR
IN PSRR
-
f
PSRR
-
-
- -
f
PSRR
f
IN
f
IN PSRR
- f
f +
IN PSRR
f
5 15 25 35 45
0
100-
80-
60-
40-
20-
−80
−70
−60
−50
−40
−30
−20
−10
0
0 10 20 30 40 50 60 70 80 90 100
Frequency of Signal on Supply (MHz)
PSRR (dB)
PSRR on AVDD Supply 50mV
PP
PSRR on AVDD 3V Supply 100mV
PP
-120
Frequency(MHz)
0 125
Amplitude(dB)
25 50 75 100
f =170MHz
f =10MHz,50mV
SFDR=77.69dB
Amplitude(f )= 1dBFS
Amplitude(f )= 93.8
Amplitude(f +f )= 78.8
Amplitude(f f )= 81
IN
CM PP
IN
CM
IN CM
IN CM
-
-
-
- -
f =10MHz
CM
f =170MHz
IN
f f =
160MHz
IN CM
-
f +f =
180MHz
IN CM
0
-100
-80
-60
-40
-20
−60
−50
−40
−30
−20
−10
0
0 50 100 150 200 250 300
Frequency of Input Common−Mode Signal (MHz)
CMRR (dB)
Input Frequency = 170MHz
50mV
PP
Signal Superimposed
on Input Common−Mode Voltage (1.7V)
ADS41B29
ADS41B49
SBAS486E – NOVEMBER 2009–REVISED JULY 2012 www.ti.com
TYPICAL CHARACTERISTICS: GENERAL
At +25°C, AVDD = 1.8V, AVDD_BUF = 3.3V, DRVDD = 1.8V, maximum rated sampling frequency, sine wave input clock,
1.5V
PP
differential clock amplitude, 50% clock duty cycle, –1dBFS differential analog input, DDR LVDS output interface, and
32k-point FFT, unless otherwise noted.
CMRR ACROSS FREQUENCY CMRR FFT
Figure 47. Figure 48.
PSRR ACROSS FREQUENCY PSRR FFT
Figure 49. Figure 50.
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Product Folder Link(s): ADS41B29 ADS41B49