Datasheet

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Input Clock Duty Cycle (%)
THD (dBc)
SNR (dBFS)
THD
SNR
Input Frequency = 10MHz
ADS41B29
ADS41B49
www.ti.com SBAS486E – NOVEMBER 2009–REVISED JULY 2012
TYPICAL CHARACTERISTICS: ADS41B29 (continued)
At +25°C, AVDD = 1.8V, AVDD_BUF = 3.3V, DRVDD = 1.8V, maximum rated sampling frequency, sine wave input clock,
1.5V
PP
differential clock amplitude, 50% clock duty cycle, –1dBFS differential analog input, DDR LVDS output interface, and
32k-point FFT, unless otherwise noted.
PERFORMANCE ACROSS INPUT CLOCK DUTY CYCLE
Figure 46.
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Product Folder Link(s): ADS41B29 ADS41B49