Datasheet

ADS41B29
ADS41B49
SBAS486E – NOVEMBER 2009–REVISED JULY 2012 www.ti.com
Register Address 01h (Default = 00h)
7 6 5 4 3 2 1 0
LVDS SWING 0 0
Bits[7:2] LVDS SWING: LVDS swing programmability
(1)
000000 = Default LVDS swing; ±350mV with external 100Ω termination
011011 = LVDS swing increases to ±410mV
110010 = LVDS swing increases to ±465mV
010100 = LVDS swing increases to ±570mV
111110 = LVDS swing decreases to ±200mV
001111 = LVDS swing decreases to ±125mV
Bits[1:0] Always write '0'
(1) The EN LVDS SWING register bits must be set to enable LVDS swing control.
Register Address 03h (Default = 00h)
7 6 5 4 3 2 1 0
0 0 0 0 0 0 HI PERF MODE 1
Bits[7:2] Always write '0'
Bits[1:0] HI PERF MODE 1: High performance mode 1
00 = Default performance after reset
01 = Do not use
10 = Do not use
11 = For best performance across sampling clock and input signal frequencies, set the HIGH PERF
MODE 1 bits
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