Datasheet

GND
3.3V
VSS-
VSS+
J16
J11
J9
J12
TPS79618
LDORegultorto 1.8V
JP17
1
JP19
1
1.8V
THS4509
TPS62560
Switchingregulatorto
1.8V
JP13
1
To 1.8VA
JP14
To 1.8VD
1
To 3.3VClock
Generator
JP3
To 3.3VBuffer
3.3V
Circuit Description www.ti.com
Figure 3. ADS41xx/58B18EVM Power Distribution
Some ADC devices that may be evaluated on the ADS41xx/58B18 platform require a 3.3-V supply for an
internal front-end buffer. For this reason, an isolated 3.3V_BUF supply is on the power section of the
schematic.
Power for the optional THS4509 operational amplifier is supplied by banana jacks J9 and J11. If the
amplifier is being evaluated, 5 V is supplied to J9 and J11 is connected to ground. Otherwise, these inputs
may be left unconnected.
The power supply for the default operation of the ADS41xx/58B18EVM has been simplified by requiring
only a single 3.3 V. Table 2 displays the general jumper setting information; Table 3 displays the various
power option settings. Prior to making any jumper settings, see the schematic located on the TI Web site
in the relevant ADS41xx or ADS41Bxx product folder.
Table 2. EVM Power Supply Jumper Description
EVM Banana Description Jumper setting
Jack/Jumper
J16 Input 3.3-V power supply input
JP3 3.3 V for CDCE72010 Shunt for CDCE72010 operation
JP13 1.8-VA input 1-2 → 1.8 V from LDO/switching regular to 1.8 VA of ADC
(default); 2-3 → option for external 1.8-V supply
JP14 1.8-VD input 1-2 → 1.8 V from LDO/switching regular to 1.8 VD of ADC
(default); 2-3 → option for external 1.8-V supply
JP17 3.3-V input selection for 1-2 → 3.3-V input for TPS62562 (default); 2-3 → 3.3-V input for
LDO/switching regulator TPS79618
JP19 1.8-V selection from LDO/switching 1-2 → 1.8-V output from TPS62562 (default); 2-3 → 1.8-V
regulator output from TPS79618
8
ADS41xx/58B18EVM SLWU067C–November 2009–Revised May 2012
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