Datasheet
0
20
40
60
80
100
120
-
-
-
-
-
-
Amplitude(dB)
0 10 20 30 40 50
80
Frequency(MHz)
SFDR=94dBc
SNR=70dBFS
SINAD=70dBFS
THD=93dBc
7060
0
20
40
60
80
100
120
-
-
-
-
-
-
Amplitude(dB)
0 10 20 30 40 50
80
Frequency(MHz)
SFDR=82.5dBc
SNR=69.2dBFS
SINAD=68.9dBFS
THD=80.7dBc
7060
0
20
40
60
80
100
120
-
-
-
-
-
-
Amplitude(dB)
0 10 20 30 40 50
80
Frequency(MHz)
SFDR=78.3dBc
SNR=67.6dBFS
SINAD=67dBFS
THD=75.3dBc
7060
0
10
20
30
40
50
60
70
80
90
100
110
120
130
140
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Amplitude(dB)
0 10 20 30 40
80
Frequency(MHz)
50 7060
EachToneat 7dBFSAmplitude
f =185MHz
f =190MHz
Two-ToneIMD=89dBFS
SFDR=93dBFS
-
IN1
IN2
95
90
85
80
75
70
65
60
SFDR(dBc)
0 50 100 150 200
500
InputFrequency(MHz)
300 400250 350 450
-1dBFS ,1dBGainInput
-2dBFS ,0dBGainInput
71.0
70.5
70.0
69.5
69.0
68.5
68.0
67.5
67.0
66.5
66.0
65.5
65.0
SNR(dBFS)
0 50 100 150 200
500
InputFrequency(MHz)
300 400250 350 450
-1dBFS ,1dBGainInput
-2dBFS ,0dBGainInput
ADS4126
,
ADS4129
ADS4146
,
ADS4149
www.ti.com
SBAS483G – NOVEMBER 2009–REVISED JANUARY 2011
TYPICAL CHARACTERISTICS: ADS4126
At +25°C, AVDD = 1.8V, DRVDD = 1.8V, maximum rated sampling frequency, sine wave input clock, 1.5V
PP
differential clock
amplitude, 50% clock duty cycle, –1dBFS differential analog input, 1dB gain, low-latency mode, DDR LVDS output interface,
and 32k-point FFT, unless otherwise noted. Note that after reset, the device is in 0dB gain mode.
FFT FOR 10MHz INPUT SIGNAL FFT FOR 170MHz INPUT SIGNAL
Figure 15. Figure 16.
FFT FOR 300MHz INPUT SIGNAL FFT FOR TWO-TONE INPUT SIGNAL
Figure 17. Figure 18.
SFDR vs INPUT FREQUENCY SNR vs INPUT FREQUENCY
Figure 19. Figure 20.
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Product Folder Link(s): ADS4126 ADS4129 ADS4146 ADS4149