Datasheet

ADS4126

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SBAS483G – NOVEMBER 2009–REVISED JANUARY 2011

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7 6 5 4 3 2 1 0

FREEZE BYPASS

OFFSET OFFSET OFFSET CORR TIME CONSTANT 0 0

CORR CORR

Bit 7 FREEZE OFFSET CORR

This bit sets the freeze offset correction.

0 = Estimation of offset correction is not frozen (bit EN OFFSET CORR must be set)

1 = Estimation of offset correction is frozen (bit EN OFFSET CORR must be set). When frozen, the

last estimated value is used for offset correction every clock cycle. See OFFSET CORRECTION,

Offset Correction.

Bit 6 Always write '0'

Bits[5:2] OFFSET CORR TIME CONSTANT

These bits set the offset correction time constant for the correction loop time constant in number of

clock cycles.

VALUE TIME CONSTANT (Number of Clock Cycles)

0000 1M

0001 2M

0010 4M

0011 8M

0100 16M

0101 32M

0110 64M

0111 128M

1000 256M

1001 512M

1010 1G

1011 2G

Bits[1:0] Always write '0'

7 6 5 4 3 2 1 0

0 0 LOW SPEED 0 0 0 0

Bits[7:1] Always write '0'

Bit 0 LOW SPEED: Low-speed mode

00, 01, 10 = Low-speed mode disabled (default state after reset); this setting is recommended for

sampling rates greater than 80MSPS.

11 = Low-speed mode enabled; this setting is recommended for sampling rates less than or equal

to 80MSPS.

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