Datasheet

CLKOUTP
CLKOUTM
Output
DataPair
Dn
(1)
Dn+1
(1)
Dn_Dn+1_P
Dn_Dn+1_M
CL MK
CL PK
Output
Clock
Input
Clock
t
SU
t
H
t
SU
t
H
t
PDI
CLKOUT
Output
Data
Dn
(1)
Dn
CL MK
CL PK
Output
Clock
Input
Clock
Output
Data
Dn
(1)
Dn
t
START
CL MK
CL PK
Input
Clock
t
DV
t
SU
t
H
t
PDI
ADS4126 , ADS4129
ADS4146 , ADS4149
www.ti.com SBAS483G – NOVEMBER 2009–REVISED JANUARY 2011
(1) Dn = bits D0, D2, D4, etc. Dn + 1 = Bits D1, D3, D5, etc.
Figure 9. LVDS Mode Timing
Dn = bits D0, D1, D2, etc.
Figure 10. CMOS Mode Timing
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