Datasheet
+5V
0.1 Fm 10 Fm
+3V+5V
0.1 Fm 10 Fm
1
2
3
6
7
9
10
11
12
48
47
DVDD
DGND
AVDD
AGND
AGND
AGND
AVDD
AGND
AGND
AVDD
AVDD
58
17
18 19 20 23
24
25 26
27
31
ADS1672
57 56 54 53
AVDD AGND AGND
DVDD
DVDD
DGND
DGND DGND
DGND DGND
DGND DGND
DVDD
AGND AVDD
52 51
DVDD DGND
50 49
DGND DVDD
0.1 Fm 0.1 Fm
0.1 Fm 10 Fm
0.1 Fm
10 Fm
ADS1672
SBAS402D –JUNE 2008–REVISED JULY 2010
www.ti.com
POWER SUPPLIES blank
Two supplies are used on the ADS1672: analog Power-supply pins 53 and 54 are used to drive
(AVDD) and digital (DVDD). Each supply must be internal clock supply circuits and, as a result, are
suitably bypassed to achieve the best performance. It generally very noisy. It is highly recommended that
is recommended that a 1mF and 0.1mF ceramic traces from these pins not be shared or run close to
capacitor be placed as close to each supply pin as any of the adjacent AVDD or AGND pins of the
possible. Connect each supply-pin bypass capacitor ADS1672. These pins should be well-decoupled,
to the associated ground. Each main supply bus using a 0.1mF ceramic capacitor placed close to the
should also be bypassed with a bank of capacitors pins, and immediately terminated into the power and
from 47mF to 0.1mF. Figure 38 illustrates the ground planes.
recommended method for ADS1672 power-supply
decoupling.
Figure 38. Power-Supply Decoupling
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