Datasheet
0
50
100
150
-
-
-
Magnitude(dB)
0
Frequency(f /
IN
f
CLK)
1 2 3
120
100
80
60
40
20
0
20-
Settling(%)
0 10 20 30 40 50 60
Conversions(1/t )
DRDY-WB
Fullysettled
at55
conversions
START
DRDY
t
DRDY
(1)
t
DRDY
t
DRDY
t
DRDY
CLK
t
SETTLE
t
START_CLKR
ADS1672
SBAS402D –JUNE 2008–REVISED JULY 2010
www.ti.com
Settling Time
The overall frequency response repeats at the
modulator sampling rate, which is the same as the
The Wide-Bandwidth filter fully settles before
input clock frequency. Figure 33 shows the response
indicating data are ready for retrieval after the START
with the fastest data rate selected (625kSPS when
pin is taken high, as shown in Figure 35. For this
f
CLK
= 20MHz).
filter, the settling time is larger than the conversion
time: t
SETTLE-WB
> t
DRDY-WB
. Instantaneous steps on
the input require multiple conversions to settle if
START is not pulsed. Figure 34 shows the settling
response with the x-axis normalized to conversions or
data-ready cycles. The output is fully settled after 55
data-ready cycles.
Figure 33. Extended Frequency Response of
Wide-Bandwidth Path
Phase Response
The wide-bandwidth filter uses a multiple-stage,
linear-phase digital filter. Linear phase filters exhibit
Figure 34. Step Response for
constant delay time versus input frequency (also
Wide-Bandwidth Filter
know as constant group delay). This feature means
that the time delay from any instant of the input signal
to the corresponding same instant of the output data
is constant and independent of the input signal
frequency. This behavior results in essentially zero
phase error when measuring multi-tone signals.
(1) t
DRDY
= 1/f
DATA
. See Table 7 for the relationship between t
SETTLE
and t
DRDY
when using the Wide-Bandwidth filter.
Figure 35. START Pin Used for Multiple Conversions with Wide-Bandwidth Filter Path
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