Datasheet

Full-scalerange
RMSnoise
ln(2)
ENOB=
ln
Z = 3.125kW
EFF
·
20MHz
f
CLK
(
(
AINP
AINN
ADS1672
SBAS402D JUNE 2008REVISED JULY 2010
www.ti.com
NOISE PERFORMANCE ANALOG INPUTS (AINP, AINN)
The ADS1672 offers outstanding noise performance The ADS1672 measures the differential signal,
that can be optimized by adjusting the data rate. As V
IN
= (AINP AINN), against the differential
the averaging is increased (thus reducing the data reference, V
REF
= (VREFP VREFN). The most
rate), the noise drops correspondingly. Table 2 shows positive measurable differential input is V
REF
, which
the noise as a function of data rate for both the produces the most positive digital output code of
low-latency and the wide-bandwidth filter paths under 7FFFFFh. Likewise, the most negative measurable
the conditions shown. differential input is –V
REF
, which produces the most
negative digital output code of 800000h.
Table 2 lists some of the more common methods of
specifying noise. The dynamic range is the ratio of Analog inputs must be driven with a differential signal
the root-mean-square (RMS) value of a full-scale sine to achieve optimum performance. The recommended
wave to the RMS noise with the inputs shorted common-mode voltage is 2.5V. The ADS1672
together. This value is expressed in decibels relative samples the analog inputs at very high speeds. It is
to full-scale (dBFS). The input-referred noise is the critical that a suitable driver be used. See the
RMS value of the noise with the inputs shorted, Application Information section for recommended
referred to the input of the ADS1672. The effective circuit designs.
number of bits (ENOB) is calculated from a dc
The ADS1672 uses a switched-capacitor circuitry to
perspective using the formula in Equation 1, where
measure the input voltage. Internal capacitors are
full-scale range equals 2V
REF
.
charged by the inputs and then discharged internally
with each clock (CLK) cycle. Figure 22 shows the
effective input impedance seen by the driving
amplifier.
(1)
Noise-free bits specifies noise, again from a dc
perspective using Equation 1, with peak-to-peak
noise substituted for RMS noise.
Figure 22. Effective Input Impedance
Table 2. Noise Performance
(1)
DATA DYNAMIC INPUT-REFERRED NOISE-FREE
FILTER PATH RATE[1:0] DATA RATE RANGE NOISE ENOB BITS
00 36kSPS 115dB 3.9mV
RMS
20.6 17.8
Low-Latency
01 68kSPS 113dB 5.0mV
RMS
20.2 17.5
(single-cycle settling
10 120kSPS 110dB 6.7mV
RMS
19.8 17.1
configuration)
11 180kSPS 108dB 8.9mV
RMS
19.4 16.7
00 78.1kSPS 115.5dB 3.9mV
RMS
20.6 17.8
01 156.3kSPS 113dB 5.0mV
RMS
20.2 17.5
Wide-Bandwidth
10 312.5kSPS 110dB 6.8mV
RMS
19.8 17.0
11 625.0kSPS 107dB 10.1mV
RMS
19.2 16.5
(1) V
REF
= 3V, f
CLK
= 20MHz.
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