Datasheet

4 Reference Buffer
OPA211
C52
47 Fm
C15
C19
C71
C26
R17
R33
R18
VREFP
+5VCC
C29 ||C54 ||C16
REF5030
OUT
TRIM
U1
U4
C24
22 Fm
C73
47 Fm
C23
0.1 Fm
5 Power Supplies
Reference Buffer www.ti.com
The ADS1672 reference pins have switched capacitor inputs. At a clock rate of 20MHz (X1), a charge
injection in and out of the ADS1672 reference input occurs. The external reference voltage that drives the
ADS1672 reference pin must settle in less than 50ns. The REF5030 (U1) generates the 3.0V reference
signal (Figure 3 ). The output of the REF5030 is heavily filtered to remove noise. The onboard OPA211
(U4) again filters and buffers the reference signal so that the reference signal noise to the ADS1672 is
less than the noise generated by the converter itself. The OPA211 is a low-noise, unity-gain stable
amplifier that provides a reliable current source for the ADS1672 reference input. The OPA211 and output
decoupling capacitors work together to settle the VREFP (ADS1672) reference input voltage to within ± 1/2
LSB, every 50ns. This board uses a 22 µ F ceramic capacitor with a 0.1 µ F ceramic capacitor directly
across the reference inputs, VREFP and VREFN. Note that the 22 µ F and 0.1 µ F capacitors are placed as
close to the ADS1672 reference pins as possible. These capacitors further reduce noise that is common
to both inputs. The ADS1672 VREFN pin goes to ground.
Figure 3. ADS1672 External Reference and Buffer
J4 (see Figure 1 ) is the power-supply input connector. Table 2 lists the configuration details for J4.
Table 2. J4 Configuration: Power-Supply Input
Pin No. Pin Name Function Required
J4.1 +VA +VCC Optional
J4.2 –VA –VCC Optional
J4.3 +5VA +5VCC Always
J4.4 NC No connection No
J4.5 NC No connection No
J4.6 AGND Analog ground input Always
J4.7 NC No connection No
J4.8 NC No connection No
J4.9 +3.3V 3.3V digital supply Always
J4.10 NC No connection No
6 ADS1672EVM and ADS1672EVM-PDK User's Guide SBAU147 – March 2009
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