Datasheet

12.1.1 Settings Tab
Evaluating with the ADCPro Software www.ti.com
Settings on the ADS1672EVM correspond to settings described in the ADS1672 data sheet; see the
ADS1672 data sheet (available for download at the www.ti.com) for details.
Because the effective data rate of the ADS1672 depends on settings of the Modulator Clock and the
operating modes of FPATH, LL_CONFIG, and the Data Rate Bits, the Data Rate indicator (in the upper
right corner of the plug-in interface) is always visible and updated whenever a setting is changed that
affects the data rate.
The FPATH control (illustrated in Figure 20 ) can configure the ADS1672 digital filter as a Wide-Bandwidth
Filter or Low-Latency Filter setting.
Figure 20. FPATH settings
The LL_CONFIG control can configure the ADS1672 in a Single Cycle Settling mode or Fast Response.
Figure 21 shows the LL_CONFIG options.
Figure 21. LL_CONFIG Settings
The Data Rate Bits can be configured as 00b, 01b, 10b, or 11b. Figure 22 shows the Data Rate Bits
options.
Figure 22. Data Rate Bits Setting Options
The Modulator Clock can be configured to match the onboard oscillator (20MHz) or the external clock. The
setting of the Modulator clock in ADCPro will change the Data Rate indicator in the top right corner of the
plug-in interface. The Post Averages option is used to average the data output results after data have
been collected. Figure 23 shows the Modulator Clock and Post Averages options.
Figure 23. Modulator Clock and Post Averages Options
22 ADS1672EVM and ADS1672EVM-PDK User's Guide SBAU147 – March 2009
Submit Documentation Feedback