Datasheet

AINP+AINN
2
V =
CM
SD
Modulator
Digital
Filter
Serial
Interface
S
V
IN
VREFN IOVDDVREFP
V
REF
S
AINP
AINN
FSO
FSO
DOUT
DOUT
SCLK
SCLK
CLK
ADS1602
www.ti.com SBAS341E –DECEMBER 2004– REVISED OCTOBER 2011
OVERVIEW
The ADS1602 is a high-performance delta-sigma The ADS1602 supports a very wide range of input
(ΔΣ) analog-to-digital converter (ADC). The modulator signals. For V
REF
= 3V, the full-scale input voltages
uses an inherently stable 2-1-1 multi-stage are ±3V. Having such a wide input range makes
architecture incorporating proprietary circuitry that out-of-range signals unlikely. However, should an
allows for very linear high-speed operation. The out-of-range signal occur, the digital output OTR goes
modulator samples the input signal at 40MSPS (when high.
f
CLK
= 40MHz). A low-ripple linear phase digital filter
The analog inputs must be driven with a differential
decimates the modulator output by 16 to provide high
signal to achieve optimum performance. For the input
resolution 16-bit output data.
signal:
Conceptually, the modulator and digital filter measure
the differential input signal, V
IN
= (AINP – AINN),
against the scaled differential reference,
V
REF
= (VREFP – VREFN), as shown in Figure 38.
the recommended common-mode voltage is 1.5V. In
The voltage reference can either be generated
addition to the differential and common-mode input
internally or supplied externally. A three-wire serial
voltages, the absolute input voltage is also important.
interface, designed for direct connection to DSPs,
This is the voltage on either input (AINP or AINN)
outputs the data. A separate power supply for the I/O
with respect to AGND. The range for this voltage is:
allows flexibility for interfacing to different logic
–0.1V < (AINN or AINP) < 4.6V
families. Out-of-range conditions are indicated with a
dedicated digital output pin. Analog power dissipation
If either input is taken below –0.1V, ESD protection
is controlled using an external resistor. This control
diodes on the inputs will turn on. Exceeding 4.6V on
allows reduced dissipation when operating at slower
either input results in degradation in the linearity
speeds. When not in use, power consumption can be
performance. ESD protection diodes will also turn on
dramatically reduced by setting the PD pin low to
if the inputs are taken above AVDD (+5V).
enter Power-Down mode.
The recommended absolute input voltage is:
ANALOG INPUTS (AINP, AINN)
–0.1V < (AINN or AINP) < 4.2V
The ADS1602 measures the differential signal,
Keeping the inputs within this range provides for
V
IN
= (AINP – AINN), against the differential
optimum performance.
reference, V
REF
= (VREFP – VREFN). The most
positive measurable differential input is V
REF
, which
produces the most positive digital output code of
7FFFh. Likewise, the most negative measurable
differential input is –V
REF
, which produces the most
negative digital output code of 8000h.
Figure 38. Conceptual Block Diagram
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