Datasheet
Analog or Digital
Set CLKSEL Pin = 1,
Wait for Internal
Oscillator to Start Up
Set PWDN = 1
Set RESET = 1
Wait for 1 s
Issue Reset Pulse,
Wait for 18 t
CLK
s
Set START = 1
Write Certain
Registers,
Including Input
Set PDB_REFBUF = 1
and Wait for Internal
Reference
Send SDATAC
Command
Set CLKSEL Pin = 0
and Provide External Clock
f = 2.048 MHz
External
Reference
External
RDATAC
Capture Data
and Test Signal
Set Test Signals
Capture Data
and Check Noise
// Follow Power-Up Sequencing
// If START is tied high, after this step
// DRDY toggles at f
CLK
/ 64
// Delay for Power-On Reset and Oscillator Start-Up
// Activate DUT
// CS can be Either Tied Permanently Low
// Or Selectively Pulled Low Before Sending
// Commands or Reading and Sending Data from or to the Device
// Device Wakes Up in RDATAC Mode, so Send
// SDATAC Command so Registers can be Written
SDATAC
// If Using Internal Reference, Send This Command
WREG CONFIG3 C0h
// Set Device for DR = f
MOD
/ 32
WREG CONFIG1 91h
WREG CONFIG2 E0h
// Set All Channels to Input Short
WREG CHnSET 01h
// Activate Conversion
// After This Point DRDY Should Toggle at
// f
CLK
/ 64
// Put the Device Back in RDATAC Mode
RDATAC
// Look for DRDY and Issue 24 + n u 24 SCLKs
// Activate a (1 mV / 2.4 V) Square-Wave Test Signal
// On All Channels
SDATAC
WREG CONFIG2 F0h
WREG CHnSET 05h
RDATAC
YES
YES
NO
NO
// Look for DRDY and Issue 24 + n u 24 SCLKs
ADS131E04
ADS131E06
ADS131E08
SBAS561A –JUNE 2012–REVISED APRIL 2013
www.ti.com
Figure 50. Initial Flow at Power-Up
52 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: ADS131E04 ADS131E06 ADS131E08