Datasheet

(b) Voltage Sensing with Single-Ended Input(a) Voltage Sensing with Differential Input
R2
INP
INN
Device
EMI
Filter
R3
R3
+
-
OPAMPOUT
OPAMPN
OPAMPP
R
F
(AVDD + AVSS)
2
OPAMP_REF
C
LN
R1
R1
R2
INP
INN
Device
EMI
Filter
R3
C
+
-
OPAMPOUT
OPAMPN
OPAMPP
R
F
(AVDD + AVSS)
2
OPAMP_REF
LN
R1
R2
To PGA To PGA
ADS131E04
ADS131E06
ADS131E08
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SBAS561A JUNE 2012REVISED APRIL 2013
VOLTAGE SENSING
Figure 45 shows a simplified diagram of commonly-used differential and single-ended methods of voltage
sensing. A resistor divider network is used to step down the line voltage within the acceptable ADS131E0x input
range and then directly connect to the inputs (INP and INN) through an antialiasing RC filter formed by resistor
R3 and capacitor C. The common-mode bias voltage (AVDD + AVSS) / 2, can be obtained from the ADS131E0x
by either configuring the internal op amp in a unity-gain configuration using the R
F
resistor and setting bit 3 of the
CONFIG3 register, or it can be generated externally by using a simple resistor divider network between the
positive and negative supplies.
In either of the below cases (Figure 45a for a differential input and Figure 45b for a single-ended input), the line
voltage is divided down by a factor of [R2 / (R1 + R2)]. Values of R1 and R2 must be carefully chosen so that the
voltage across the ADS131E0x inputs (INP and INN) does not exceed the FSDI range of ADS131E0x (see
Table 12) over the full operating dynamic range of the energy meter.
Figure 45. Simplified Voltage Sensing Connections
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