Datasheet

ADS131E04

ADS131E06

ADS131E08

www.ti.com

SBAS561A –JUNE 2012–REVISED APRIL 2013

CONFIG2: Configuration Register 2

Address = 02h

BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0

1 1 1 INT_TEST 0 TEST_AMP0 TEST_FREQ1 TEST_FREQ0

This register configures the test signal generation. See the Input Multiplexer section for more details.

Bits[7:5] Must be set to '1'

Bit 4 INT_TEST: Test source

This bit determines the source for the Test signal.

0 = Test signals are driven externally (default)

1 = Test signals are generated internally

Bit 3 Must be set to '0'

Bit 2 TEST_AMP: Test signal amplitude

These bits determine the Calibration signal amplitude.

0 = 1 × –(VREFP – VREFN) / 2400 (default)

1 = 2 × –(VREFP – VREFN) / 2400

Bits[1:0] TEST_FREQ[1:0]: Test signal frequency

These bits determine the calibration signal frequency.

00 = Pulsed at f

CLK

/ 2

(default)

01 = Pulsed at f

CLK

/ 2

10 = Not used

11 = At dc

Product Folder Links: ADS131E04 ADS131E06 ADS131E08