Datasheet

ADS131E04
ADS131E06
ADS131E08
www.ti.com SBAS561A –JUNE 2012–REVISED APRIL 2013
SPI COMMAND DEFINITIONS
The ADS131E0x provide flexible configuration control. The opcode commands, summarized in Table 9, control
and configure device operation. The opcode commands are stand-alone, except for the register read and register
write operations that require a second command byte plus data. CS can be taken high or held low between
opcode commands but must stay low for the entire command operation (especially for multibyte commands).
System opcode commands and the RDATA command are decoded by the ADS131E0x on the seventh SCLK
falling edge. The register read and write opcodes are decoded on the eighth SCLK falling edge. Be sure to follow
SPI timing requirements when pulling CS high after issuing a command.
Table 9. Command Definitions
COMMAND DESCRIPTION FIRST BYTE SECOND BYTE
System Commands
WAKEUP Wake-up from standby mode 0000 0010 (02h)
STANDBY Enter standby mode 0000 0100 (04h)
RESET Reset the device 0000 0110 (06h)
START Start or restart (synchronize) conversions 0000 1000 (08h)
STOP Stop conversion 0000 1010 (0Ah)
OFFSETCAL Channel offset calibration 0001 1010 (1Ah)
Data Read Commands
Enable Read Data Continuous mode.
RDATAC 0001 0000 (10h)
This mode is the default mode at power-up.
(1)
SDATAC Stop Read Data Continuously mode 0001 0001 (11h)
RDATA Read data by command; supports multiple read back. 0001 0010 (12h)
Register Read Commands
RREG Read n nnnn registers starting at address r rrrr 001r rrrr (2xh)
(2)
000n nnnn
(2)
WREG Write n nnnn registers starting at address r rrrr 010r rrrr (4xh)
(2)
000n nnnn
(2)
(1) When in RDATAC mode, the RREG command is ignored.
(2) n nnnn = number of registers to be read or written – 1. For example, to read or write three registers, set n nnnn = 0 (0010). r rrrr =
starting register address for read and write opcodes.
WAKEUP: Exit STANDBY Mode
This opcode exits low-power standby mode; see the STANDBY: Enter STANDBY Mode subsection of the SPI
Command Definitions section. Be sure to allow enough time for all circuits in shutdown mode to power up (see
the Electrical Characteristics for details). There are no SCLK rate restrictions for this command and it can be
issued at any time. Any following command must be sent after 4 t
CLK
cycles.
STANDBY: Enter STANDBY Mode
This opcode command enters low-power standby mode. All parts of the circuit are shut down except for the
reference section. The standby mode power consumption is specified in the Electrical Characteristics. There are
no SCLK rate restrictions for this command and it can be issued at any time. Do not send any other
command other than the wakeup command after the device enters standby mode.
RESET: Reset Registers to Default Values
This command resets the digital filter cycle and returns all register settings to default values. See the Reset
(RESET) subsection of the SPI Interface section for more details. There are no SCLK rate restrictions for this
command and it can be issued at any time. It takes 18 t
CLK
cycles to execute the RESET command. Avoid
sending any commands during this time.
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