Datasheet

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
DVDD
GPIO4
GPIO3
GPIO2
DOUT
GPIO1
DAISY_IN
SCLK
START
CLK
DIN
DGND
DRDY
CS
RESET
PWDN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
IN8N
IN8P
IN7N
IN7P
IN6N
IN6P
IN5N
IN5P
IN4N
IN4P
IN3N
IN3P
IN2N
IN2P
IN1N
IN1P
RESERVED
BIASOUT
BIASIN
BIASINV
BIASREF
AVDD
AVSS
AVSS
AVDD
VCAP3
AVDD1
AVSS1
CLKSEL
DGND
DVDD
DGND
SRB1
2
AVDD
AVSS
AVDD
AVDD
AVSS
VREFP
VREFN
VCAP4
NC
VCAP1
NC
VCAP2
RESV1
AVSS
SRB
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
ADS1299
www.ti.com SBAS499A –JULY 2012–REVISED AUGUST 2012
PIN CONFIGURATION
PAG PACKAGE
TQFP-64
(TOP VIEW)
PIN ASSIGNMENTS
NAME TERMINAL FUNCTION DESCRIPTION
AVDD 19, 21, 22, 56 Supply Analog supply
AVDD 59 Supply Charge pump analog supply
AVDD1 54 Supply Analog supply
AVSS 20, 23, 32, 57 Supply Analog ground
AVSS 58 Supply Charge pump analog ground
AVSS1 53 Supply Analog ground
BIASIN 62 Analog input Bias drive input to MUX
BIASINV 61 Analog input/output Bias drive inverting input
BIASOUT 63 Analog output Bias drive output
BIASREF 60 Analog input Bias drive noninverting input
CS 39 Digital input SPI chip select; active low
CLK 37 Digital input Master clock input
CLKSEL 52 Digital input Master clock select
DAISY_IN 41 Digital input Daisy-chain input
DGND 33, 49, 51 Supply Digital ground
DIN 34 Digital input SPI data in
DOUT 43 Digital output SPI data out
DRDY 47 Digital output Data ready; active low
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